| What's Different About Multiprocessor Software? Part 4, Services and Middleware for Embedded Multiprocessors by EE Times Embedded |
April 30, 2007 -- The services available for an embedded multiprocessor can be provided by the operating system or by other software packages, but the services are used to build applications. Services may include the services provided by an embe ... read more |
| We Need a New Approach to Accurately Simulate Large Circuits by Xoomsys, Inc. in EE Times EDA Designline |
April 30, 2007 -- As geometries shrink below 65nm, designers are encountering significant shortcomings in their current circuit verification processes. The options available for accurately verifying design behavior, especially post layout, are v ... read more |
| Using Sub-RISC Processors in Next Generation Customizable Multi-Core Designs: Part 4 by EE Times Embedded |
April 29, 2007 -- To demonstrate the capabilities of TIPI (Tiny Instruction-set Processors and Interconnect) architectures, we construct a novel processing element for network processing. The ClickPE architecture takes into account the process-l ... read more |
| Dealing with SOC Hardware/Software Design Complexity with Scalable Verification Methods by Brian Bailey Consulting in EE Times Embedded |
April 27, 2007 -- The problem with today's existing methodologies is that verification is subservient to design. This principle requires a shift in paradigm, especially in designing complex electronic systems. Why?
Functional errors main ... read more |
| For Better Analog Video, Try Differential Signaling by Electronic Design Magazine |
April 27, 2007 -- Compared to single-ended signaling, differential signaling offers many benefits: less electromagnetic interference (EMI), less distortion, lower supply voltage, and lower costii. These advantages have prompted the adoption of d ... read more |
| Video Codecs in SOCs Using OCP-Based Programmable Accelerator Design by CoWare, Inc. in Video/Imaging DesignLine |
April 27, 2007 -- OCP standardizes the communication and infrastructure in SoC designs and thereby ensures interoperability between the IP. Using the Open Core Protocol, System on Chip designers can analyze and evaluate various processor, interc ... read more |
| Real-Time Operating Systems for DSP: Part 2 by EE Times Signal Processing DesignLine |
April 26, 2007 -- Real-time operating systems require a set of functionality to effectively perform their function, which is to be able to execute all of their tasks without violating specified timing constraints. This section describes the majo ... read more |
| Measuring Nanoamperes by EDN Magazine |
April 26, 2007 -- Thousands of applications require a circuit to measure a small current. One of the most common is the measurement of photodiode current to infer the light impinging on the diode. Scientific applications, such as CT (computer-to ... read more |
| HD-Video Encoding with DSP and FPGA Partitioning by Texas Instruments, Inc. (TI) in EDN Magazine |
April 26, 2007 -- As video and imaging applications evolve toward high-definition compression standards, coprocessing architectures that include both DSPs and FPGAs are becoming popular. However, using partitioned systems is not the only option, ... read more |
| A Tutorial on Tools, Techniques, and Methodology to Improve FPGA Designer Productivity by Xilinx, Inc. in EE Times Programmable Logic Designline |
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April 25, 2007 -- What is the biggest factor affecting the
productivity of FPGA design cycles? Many designers say achieving timing closure
is critical in getting a design to market – and with good reason. Achieving
timing closure in an e ... read more |
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