| Multi-Chip Architectures Partition H.264 Tasks to Achieve High-Quality Video by Texas Instruments, Inc. (TI) in Video/Imaging DesignLine |
October 19, 2007 -- Video is becoming all-pervasive, and consumers want it in all types of devices with various levels of video quality. For some devices, such as cell phones or portable music/video players, a single digital signal processor (DS ... read more |
| Make Front-End Power Predictable by Cadence Design Systems, Inc. in EDN Magazine |
October 19, 2007 -- Power closure has moved to the forefront of design challenges for today’s chip projects. Leakage power increases with each new process generation. Smaller geometries enable designs to fit more functions into less space, runni ... read more |
| Digitally Managed Power Circuits by Microchip Technology, Inc. in EDN Magazine |
October 19, 2007 -- Power ICs that combine analog and digital are becoming more common. Battery-charger applications have increased the need for digital functions, but high frequency and cost have limited the practicality of closed-loop, purely ... read more |
| ADCs for DSP: Part 3 by EE Times Signal Processing DesignLine |
October 18, 2007 -- All sigma-delta ADCs have a settling time associated with the internal digital filter, and there is no way to remove it. In multiplexed applications, the input to the ADC is a step function if there are different input voltag ... read more |
| Taking Advantage of Present and Future Capabilities of the General Purpose Interface Bus (GPIB) by ADLINK Technology, Inc. in EE Times Embedded |
October 18.2007 -- The IEEE 488 standard, better known as the General Purpose Interface Bus (GPIB), is a popular interface that connects instruments to computers to form ATE. GPIB was developed initially by Hewlett-Packard and was recognized as ... read more |
| FPGA-Based Access Flow Processors (AFPs) for DSLAM Line Cards by Altera Corp. in EE Times Programmable Logic Designline |
October 17, 2007 -- If it's October, it's The Fall Classic, and it's time for Grand Slams, DSLAMs, Triple Play, and Competition! While there are multiple facets to this challenge of offering more, it primarily involves enabling the triple play. ... read more |
| Streaming Video with "TimeSlice" Multicore-Friendly Processing Eliminates Dropped Frames by Video/Imaging DesignLine |
October 12, 2007 -- Technology for streaming video on the Internet is now twelve years old. Video compression has been around longer, of course, but 1995 was the year that launched companies like Vivo, VDO.net, and VXtreme. Though long forgotten ... read more |
| ADCs for DSP: Part 2 by EE Times Signal Processing DesignLine |
October 11, 2007 -- Sigma-delta analog-digital converters have been known for nearly 30 years, but only recently has the technology (high density digital VLSI) existed to manufacture them as inexpensive monolithic integrated circuits. They are ... read more |
| Low-Power Portable Product Design with FPGAs by Actel Corp. in EE Times Programmable Logic Designline |
October 10, 2007 -- The past decade has seen massive growth in portable products. When combined with time-to-market pressures and the increasing need for flexibility, this growth makes new low-power field-programmable gate arrays (FPGAs) ideal p ... read more |
| The RapidIO High-Speed Interconnect: A Technical Overview by Freescale Semiconductor, Inc. in Signal Processing DesignLine |
October 8, 2007 -- Today's high-speed embedded applications are like networks unto themselves. They possess tremendous processing resources capable of acquiring and analyzing large amounts of data that require a complex internal fabric to facil ... read more |
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