| Multicore: the Future of SOCs? by EDN Magazine |
October 30, 2008 -- Today, some SOC architects view the multicore movement as irrelevant to the embedded, often hard-real-time world of SOCs. But others predict that as we move from 90nm to 65 and 45nm and beyond, SOCs will follow server and PC- ... read more |
| Opportunities in Analog Verification by Qualcomm, Inc. in EE Times EDA Designline |
October 28, 2008 -- The wireless industry is continuously innovating and re-shaping the state-of-the-art techniques in analog and RF circuit design. The analog systems are getting increasingly challenging to design and even more to verify. The i ... read more |
| Designing Very High-Frequency Signal Generators with Amplifier ICs by EDN Magazine |
October 27, 2008 -- Oscillators and pulse generators using operational-amplifier ICs have been proposed by many authors. Such generators can be found in a flood of articles in journals, magazines, books, and IC datasheets. Their upper operating ... read more |
| Virtual Prototypes Speed Wireless Development by Carbon Design Systems, Inc. in Electronic Engineering Times (EE Times) |
October 27, 2008 -- More than one billion wireless devices are sold every year. This enormous volume, in combination with the hardware and software complexity of the devices, has given rise to an uncountable number of technical advances. Seeming ... read more |
| The Role of JTAG in System Debug and Test by Mentor Graphics Corp. in EE Times Embedded |
October 22, 2008 -- With each turn of Moore's Law, designers at every phase in the development process are challenged with new levels of complexity. Chip designers must not only get the IC logic, performance, power and yield right on first silic ... read more |
| Need a Watchdog for Improved System Fault Tolerance? by Freescale Semiconductor, Inc. in EE Times Automotive Designline |
October 22, 2008 -- Embedded electronic control units are finding their way into more and more complex safety critical and mission critical applications. Many of these applications operate in adverse conditions, which can cause code runaway in t ... read more |
| Multicore SoCs Change Interconnect Requirements by Freescale Semiconductor, Inc. in Electronic Engineering Times (EE Times) |
October 20, 2008 -- The recent appearance of multicore system-on-chip (SoC) devices has rearranged the boundaries among silicon devices, boards and subsystems. This trend has led to significant changes in chip-to-chip and board-to-board intercon ... read more |
| A Turn-off: Power Management Complicates Life for Verification Engineers by EDN Magazine |
October 16, 2008 -- There is intense pressure on all levels of chip engineering to reduce power consumption. That situation, in turn, has led to increasingly dramatic—and invasive—measures to reduce power in individual blocks and circuits. These ... read more |
| Start with the Right Op Amp when Driving SAR ADCs by Texas Instruments, Inc. (TI) in EDN Magazine |
October 16, 2008 -- SAR (successive-approximation-register) ADCs (analog-to-digital converters) are playing an increasingly prominent role in the design of highly effective data-acquisition systems for automatic test equipment, instrumentation, ... read more |
| Re-Engineering Obsolete ICs Using FPGAs by Embedded Blox, Inc. in EDN Magazine |
October 13, 2008 -- Product obsolescence is a fact of life in the IC marketplace. Given the rapid evolution of technology, and the relentless pressure for better, faster, cheaper parts, it is rare that the lifespan of an ASSP exceeds four years. ... read more |
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