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 Category: News: News Archive 2009: Monday, May 20, 2013
Alvand Technologies Announces Low-Power, Small-Die-Area ADC IP Solution in Advanced 65-nm Process Node  
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March 6, 2009 -- Alvand Technologies, Inc. has announced the production-readiness of the low-power, small die-area analog-to-digital converter (ADC) intellectual property (IP) core for advanced digital TV (DTV), digital imaging and wireless LAN applications. Designed in UMC’s leading 65-nm manufacturing process node, the ALVADC10_205M65U IP solution from Alvand is a 10-bit, 205-Msps pipeline ADC that features excellent dynamic range performance, with a signal-to-noise ratio (SNR) of 58.5dBFS, and high immunity to substrate noise.

Alvand’s ALVADC10_205M65U IP solution features a power consumption of 30mW at 205Msps, which Alvand claims represents a 200% to 500% power savings over competitive offerings. In addition, Alvand’s ADC solution features die area of 0.12mm2 in 65nm, which is up to 10X smaller than competitive solutions, according to Alvand. The combination of ultra low-power and small die area enables designers to develop high-performance systems that require a high density of multi-channel ADCs on chip, as well as highly energy efficient solutions for power-sensitive portable and mobile devices.

Alvand provides a complete design kit to for fast and reliable integration of the IP into customers’ design flow. The design kit includes datasheet, integration guideline, physical design database, LVS netlist, behavioral model, timing model, silicon validation report and evaluation board.

Go to the Alvand Technologies, Inc. website to find additional information.

E-mail Alvand Technologies, Inc. for more information.

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Alvand Technologies, Inc.
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Keywords: Alvand Technologies, ASICs, ASIC design, analog-to-digital converters, A-D converters, ADCs, IP, intellectual property, cores,
589/28228 3/6/2009 935 102


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