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 Category: News: News Archive 2009: Tuesday, May 21, 2013
Evatronix Introduces the Fast SD/ SDIO/ MMC Host Controller  
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September 29, 2009 -- Evatronix SA today announced its SDIO-HOST controller has been updated to meet the latest specifications and now supports SD 3.0, SDIO 2.0 and MMC/ eMMC 4.4 standards. These specifications allow support of SDXC cards, which go beyond the 32-GByte limit of SDHC products and sets the capacity bar at 2TBytes of data.

The latest release of the controller introduces support for the UHS-I interface, which increases the single data rate clock by 4 times to 208MHz setting the maximum operating frequency at nearly 1Gbit of data per second. The UHS-I also reduces the overall power consumption by applying lower signaling voltage level to the latest ultra-high-speed cards.

Simultaneously, the controller allows the same very high transfer rates to be achieved with MMC cards by supporting the Dual Data Rate (DDR) speed mode, which works at 54MHz on an 8-bit bus width.

Availability

The updated SDIO-HOST IP core is available now for implementation in any FPGA or ASIC technology. The IP core is delivered as an RTL source code with a set of scripts and macros for simulation/ synthesis support or as an FPGA netlist targeted to the latest programmable devices. The SDIO-HOST controller IP is complemented by a dedicated software driver that fully supports all SD/ SDIO/ MMC cards available on the market.

Go to the Evatronix SA website to find additional information.

E-mail Evatronix SA for more information.

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Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, memory controllers, Evatronix
589/29772 10/1/2009 2199 127


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