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 Category: News: News Archive 2009: Wednesday, June 19, 2013
Xelerated Releases SDK 5.0 for the HX and AX Families of Network Processors and Programmable Ethernet Switches  
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September 29, 2009 -- Xelerated, Inc. has launched the latest release of its Software Development Kit (SDK), the SDK 5.0. Designed to support Xelerated’s new generation of HX Carrier Ethernet network processors (NPUs) and AX Programmable Ethernet Switches, SDK 5.0 enables vendors to optimize network design for the new generation of Carrier Ethernet platforms and devices.

Now shipping, the SDK 5.0 supports all device types of the two families – allowing system vendors to seamlessly develop and customize data plane software for their unified fiber access and next generation Metro Ethernet platforms. The SDK 5.0 instruction set and programming model are compatible with previous NPU generations, thus easing reuse of existing applications and migration of code for existing X11 customers that are looking to optimize their data planes with the capabilities of new generation Carrier Ethernet devices.

The SDK 5.0 provides a range of software development tools to make development of data plane software straightforward and efficient:
  • Integrated development environment, where programmers can access all tools for code editing, compilation, simulation and debugging.
  • Analyzer tool with an intuitive overview of how instruction memory is utilized – enabling efficient resource optimization.
  • Simulation and debugger tools for step-by-step validation of any packet type.

As with previous-generation NPUs by Xelerated, the HX and AX Carrier Ethernet families of devices leverage dataflow architecture, with a deterministic pipeline of processor cores that makes data plane programming models efficient and easy. For example, a processor’s code can be written with a single instruction set using a straightforward sequential programming model. A unique attribute of the dataflow architecture is that once the code is successfully compiled, wirespeed performance is guaranteed for all packet sizes and services. In addition, the homogenous pipeline of processor cores simplifies code adoption for systemization of advanced and evolving unified fiber access and Metro Ethernet requirements.

Go to the Xelerated, Inc. website to find additional information.

E-mail Xelerated, Inc. for more information.

Read more about
Xelerated, Inc.
on SOCcentral.com


Keywords: embedded system design, microprocessors, MPUs, network processors, NPUs, integrated development environments, IDEs, development kits,
589/29779 10/1/2009 577 85
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