October 1, 2009 -- ChipStart, a semiconductor intellectual property solution company, announced today the availability of a new SOC intellectual property hardware and software combination, called SSM, which consolidates power, security, error recovery, and boot management by using an SOC subsystem approach. SSM lets developers add virtualization to their SOC architectures by replacing tightly coupled solutions typically engineered in house with a decoupling alternative.

Semico Research estimates that over 50 IP cores are present on average in SOCs being developed today. As a result, more SOCs contain distributed computing, multicore architectures. These topologies are making it increasingly difficult to manage power, security, error recovery and even boot sequencing. No one IP core can easily be given enough accessibility and control to manage the other cores without complicating the architecture. And with many software operating systems and applications on the single SOC, synchronizing their states with their support hardware is also becoming complex. Solutions designed in-house often result in adding some combination of extra logic and additional software development to manage the system tasks. These solutions are often designed and tested specifically for the SOC configuration. As complexities grow, significant cost and verification risks are now escalating from the need to redesign and reverify these solutions for each new chip development project.

SSM represents a unique "subsystem" alternative which decouples the system management from the specific design, promoting high reuse and faster hardware-software integration. SSM creates virtualization in the SOC architecture.

Hardware level virtualization comes from SSM's ability to operate as a self-contained unit independent from the other SOC components. SSM connects to the other IP cores using a simple hardware bus scheme. SSM utilizes commands sent to it by any source to execute the necessary signal level transitions that change an IP cores’ operation state. Software virtualization comes from SSM's ability to synchronize software and hardware states as it is performing the hardware level tasks. SSM provides API’s and a kernel which is hosted on SSM's hardware core. Drivers are connected to other software on the SOC, which communicates the status of the hardware state changes. SSM can also take command directives directly from the software through the drivers.

Says Rich Wawryzniak, Senior Analyst, Semico Research, "Virtualizing system management using a subsystem approach creates real economies when measuring the development costs for complex SOCs. Since these costs are multiplying from both hardware and software complexity growth, the need for modular SOC architectures that effects both hardware and software development dictates the need for these subsystems."

SSM uses a unique policy maker-enforcement approach to system management. SSM assumes any other resource on the SOC is a policy maker. SSM takes its commands in the form of a list, which are also called scripts. Scripts are placed into SSM’s local RAM.

SSM executes these scripts and communicates its status through a message passing scheme via the hardware bus and through its drivers. By changing the scripts, SSM can manage and change hardware and software states at any time during operation. SSM scripting eases software and hardware integration, and provides architecture consistency across chips.

Says Phil Casini, managing partner for Advance Tech Marketing, and co-developer of SSM, "Scripts make it possible to create pre-designed and pre-verified command sequences that can be mixed and matched for specific SOC instantiations. This eliminates much of the fixed design and verification costs typically associated with coordinating and managing the system resources. Scripts also marginalize the variable costs because they are reusable from instantiation to instantiation, which eases software integration."

Availability

SSM is available immediately from ChipStart.