| Cadence Introduces TLM-Driven Design and Verification Solution |
July 15, 2009 -- Cadence Design Systems, Inc. has introduced a unified TLM-driven design and verification solution and methodology enabling SOC designers to reap the benefits of transaction-level modeling (TLM). The Cadence solution combi ... read more |
| National Semi Adopts Cadence Virtuoso Simulation Solution for Complex Analog Designs |
July 15, 2009 -- Cadence Design Systems, Inc. announced today that National Semiconductor, Inc. has adopted the Cadence Virtuoso Accelerated Parallel Simulator to verify its large, complex analog designs. Verification engineers throughout ... read more |
| Altos Announces Liberate LV Library Validation Solution |
July 15, 2009 -- Altos Design Automation, Inc. today announced Liberate LV, an independent and comprehensive solution to validate cell libraries. Using Liberate LV, library teams will be able to assure the quality of all the electrical vi ... read more |
| Altos Releases Liberate MX for Highly Efficient Memory/ Macro Block Characterization |
July 15, 2009 -- Altos Design Automation, Inc. today announced Liberate MX, an ultra-fast, general-purpose library characterizer for memories and custom macro blocks. The new tool generates instance specific library models in Liberty form ... read more |
| Fujitsu Microelectronics Now Offering New, Low-Pin-Count 8-bit Flash MCU Family |
July 15, 2009 -- Fujitsu Microelectronics America, Inc. (FMA) today introduced a new, low-pin-count series of 8-bit microcontrollers (MCUs) designed for cost-sensitive consumer applications in the Americas.
The MB95200 series is an ... read more |
| OneSpin's New Debug Automation Technology Boosts Formal Assertion-Based Verification Productivity |
July 15, 2009 -- OneSpin Solutions GmbH today announced its new RootCauseAnalyzer that boosts formal ABV productivity by making SystemVerilog assertion (SVA) and RTL design debug much easier and faster. An integral part of OneSpin’s 360 M ... read more |
| Optomec and Vertical Circuits Partner to Develop Ultra-Fine Pitch 3D Interconnect Solution |
July 15, 2009 -- Optomec, Inc. and Vertical Circuits, Inc. (VCI) are collaborating in the development of a high-density 3-dimensional interconnect solution that will enable multi-functional ICs to be stacked and vertically intercon ... read more |
| Synopsys Unveils Complete IP Solution for PCI Express 3.0 |
July 15, 2009 -- Synopsys, Inc. today announced its complete DesignWare IP solution for PCI Express (PCIe) 3.0 consisting of digital controllers, PHY and verification IP. Synopsys' DesignWare IP enables easy integration of the 8.0-GTps PC ... read more |
| Lynguent Rolls Out Two New Toolkits to Support Radiation Hardened Design |
July 15, 2009 -- Lynguent, Inc. has announced two new toolkits for its ModLyng Integrated Modeling Environment (IME): Radiation Hardened By Design (RHBD) Toolkit and BSIM4 Compact Model Toolkit. The RHBD Toolkit includes models and tools ... read more |
| EDA Consortium Reports Industry Revenue Down in First Quarter 2009 |
July 15, 2009 -- The EDA Consortium (EDAC) (EDAC) Market Statistics Service (MSS) today announced that the electronic design automation (EDA) industry revenue for Q1 2009 declined 10.7% to $1192.1 million, compared to $1334.2 million in Q ... read more |
| edXact Releases Electromigration-Aware Version of Jivaro and Production-Proven Version of Comanche |
July 15, 2009 -- EdXact today announced that it will release versions 4.3 of its flagship simulation acceleration software Jivaro and version 3.1 of its parasitic rule checking analyzer Comanche at the Design Automation Conference, July 2 ... read more |
| Syntill8 to Offer Mentor Graphics' M8051 Microcontroller IP and Support Services |
July 15, 2009 -- Syntill8, Ltd. has announced a reseller agreement with Mentor Graphics Corp. Under the agreement, Syntill8 will sell and support Mentor’s proven 8-bit microcontroller intellectual property (IP) cores. This collabo ... read more |
| MontaVista Achieves Ultra-Fast One-Second Linux Boot Time in Embedded Industrial Applications |
July 14, 2009 -- MontaVista Software, Inc. today announced the achievement of ultra-fast boot times on MontaVista Linux for embedded industrial applications. At the Virtual Freescale Technology Forum this week, MontaVista is demonstrating ... read more |
| 12-bit Quad DAC with Non-Volatile EEPROM Released by Microchip Technology |
July 13, 2009 -- Microchip Technology, Inc. has announced the MCP4728 digital-to-analog converter (DAC), the first 12-bit Quad DAC to include non-volatile EEPROM, which enables the DAC’s configuration to be loaded automatically on start u ... read more |
| Jasper Design Automation Introduces Multi-Proof JasperCore for Formal Verification Deployment |
July 13, 2009 -- Jasper Design Automation has announced its latest product, JasperCore. JasperCore harnesses the proven capabilities of the company’s formal analysis engines to boost productivity and decrease the cost of deployment by pe ... read more |
| Microchip Technology Announces 8-bit Microcontrollers for Medical and Metering Applications |
July 13, 2009 -- Microchip Technology, Inc. today announced a new four-member family of high-performance 8-bit PIC microcontrollers (MCUs) for medical and metering applications. The PIC18F87J93 8-bit direct LCD-drive MCUs feature up to 1 ... read more |
| Premier Farnell's DesignLink Lets Altium Designer and OrCAD Users Specify Components from within the Design Environment |
July 13, 2009 -- Premier Farnell plc announced that Altium and EMA Design Automation have integrated Premier Farnell’s DesignLink, a new web service environment that provides an electronic interface to major computer aid design (CAD) tool ... read more |
| Renesas Electronics Halves SiP Design Time with SiP Top-Down Design Environment |
July 13, 2009 -- Renesas Electronics Europe today announced the development of its SiP Top-Down Design Environment to boost efficiency when developing system-in-package (SiP) products combining multiple chips, such as system-on-chip (SOC) ... read more |
| Toshiba Information Systems Selects Cadence Mixed-Signal Design Solution |
July 13, 2009 -- Cadence Design Systems, Inc. announced today that Toshiba Information Systems (Japan) Corp. has selected the integrated Cadence Virtuoso Custom IC and Encounter Digital Implementation System (EDI System) technology as its ... read more |
| Atrenta and Mentor Graphics Collaborate on Power Optimization for High-Level Synthesis |
July 14, 2009 -- Atrenta, Inc. has announced a collaboration with Mentor Graphics Corp. on a high-level synthesis power-optimization flow. The collaboration between the two companies has resulted in an interface between Mentor’s Ca ... read more |
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