| Mentor Graphics Announces Logic and Physical Synthesis Support for Xilinx Virtex-6 and Spartan-6 FPGAs |
June 24, 2009 -- Mentor Graphics Corp.'s suite of advanced synthesis products now support Xilinx Virtex-6 and Spartan-6 field programmable gate arrays (FPGAs). Support for the new Virtex-6 and Spartan-6 FPGA families is available now in t ... read more |
| STMicroelectronics Delivers STM32 Connectivity Line MCUS with Ethernet, USB OTG, CAN2.0B, and Audio-Class I2S Peripherals |
June 23, 2009 -- STMicroelectronics has announced full production availability of its latest STM32 Connectivity Line microcontrollers built on the ARM Cortex-M3 processor.
The STM32 Connectivity Line lets developers take advantage o ... read more |
| Tektronix Speeds Debugging of Serial and Parallel Digital Signals for Embedded Designers |
June 23, 2009 -- Tektronix, Inc. has introduced the MSO3000 Mixed Signal Oscilloscope Series to provide the embedded system designer with the ability to visualize and analyze analog, digital and serial signals on a single instrument. The ... read more |
| Sonics Combines DRAM Scheduler with Synopsys Protocol Controller for Integrated High-Performance Memory Subsystem |
June 24, 2009 -- Sonics, Inc. has announced the MemMax DRAM System, a pre-configured, verified and silicon-proven IP block that can be integrated into a variety of SOCs quickly and easily. The IP block is a combination of Sonics’ advanced ... read more |
| SMIC and Synopsys Announce Availability of Reference Flow 4.0 |
June 24, 2009 -- Synopsys, Inc. and the Semiconductor Manufacturing International Corp. (SMIC) have announced the availability of the 65-nm RTL-to-GDSII reference design flow, version 4.0. The reference flow, the result of collabor ... read more |
| Wind River’s JTAG Development Tools Support RMI Multi-Core Multi-Threaded Processors |
June 24, 2009 -- Raza Microelectronics, Inc. (RMI) today announced that Wind River Systems is offering its Wind River On-Chip Debugging with extended support for RMI’s multi-core multi-threaded XLR and XLS Processor families. Wind ... read more |
| Rambus 7.2-Gbps XDR Memory System Uses 40% Less Power than GDDR5 System |
June 24, 2009 -- Rambus, Inc. has showcased a silicon demonstration of a complete XDR memory system running at data rates up to 7.2Gbps with superior power efficiency. This silicon demonstration consists of Elpida’s recently-announced 1-G ... read more |
| New PGI 9.0 Compilers Simplify x64+GPU Programming |
June 23, 2009 -- The Portland Group, a wholly-owned subsidiary of STMicroelectronics, has announced the general availability of the PGI Release 9.0 line of high-performance parallelizing compilers and development tools for Linux, Mac OS X ... read more |
| SchmartBoard Releases $15 8-bit Microchip PIC Microcontroller Development Board |
June 24, 2009 -- SchmartBoard, Inc. recently announced the release of an 8-bit Microchip PIC development board. This single board supports virtually all 8-Bit PIC chips in an SOIC form factor.
The 2x2.5-inch board has an onboard 5- ... read more |
| DDR-PHY Interface Specification Expands with LP-DDR2 and DDR3 Support |
June 23, 2009 -- Denali Software, Inc., as one of the DDR-PHY Interface (DFI) specification participating members, has announced the release of the official DFI specification version 2.1. The DFI specification version 2.1 is now available ... read more |
| Tilera Announces Production Availability of the TilePro Family of Processors |
June 23, 2009 -- Tilera Corp.'s TilePro36 and the TilePro64 processors have passed through full qualification and will be available for production deliveries in July 2009.
The TilePro processors incorporate a number of new features ... read more |
| Dolphin Integration Offers Freeware for Evaluation of Standard Cell Libraries |
June 23, 2009 -- Dolphin Integration has released Motu Uta, a flexible logic circuit designed for being representative of complex logic designs. With Motu Uta, the benchmarking process of standard-cell libraries is both objective and fast ... read more |
| Si2 to Host Low Power Coalition Workshop at DAC 2009 Featured |
June 24, 2009 -- The Silicon Integration Initiative, Inc. (Si2) today announced the Low Power Coalition workshop being hosted at the Design Automation Conference (DAC) in San Francisco, Calif. The "Low Power Coalition Workshop – Advances ... read more |
| UMC Qualifies Comprehensive Mentor Graphics Silicon Test Suite for Its 65-nm and 40-nm IC Reference Flows |
June 23, 2009 -- Mentor Graphics Corp.'s silicon test and diagnosis suite has been validated by UMC (United Microelectronics Corp.) for use in its 65-nm and 40-nm reference flows. The foundation of this comprehensive silicon test f ... read more |
| Virage Logic’s AEON Embedded Non-Volatile Memory Now Available on a Standard CMOS Process Qualified to Rigorous Automotive Standard AEC-Q100 |
June 24, 2009 -- Virage Logic Corp. announced its AEON multi-time programmable (MTP) non-volatile memory (NVM) solution is the first qualified to the stringent quality and reliability standards of the automotive industry using only standa ... read more |
| TI's New Femtocell DSP Family Targets Developers of Residential and Enterprise Products |
June 24, 2009 -- Texas Instruments, Inc. (TI) has announced a new family of DSPs (digital signal processors) enabling residential and enterprise femtocell manufacturers and service providers to reduce development time and deliver new prod ... read more |
| TI Introduces 18-bit System-on-Chip Up to 1MSPS for High-Speed Data Acquisition |
June 22, 2009 -- Texas Instruments, Inc. (TI) has introduced two system-on-chip (SOC) solutions to enable easily development of ultra-high performance analog-to-digital converter (ADC) front ends for precision applications including high- ... read more |
| Microchip Technology Debuts Low-Power, High-Precision Op Amps |
June 23, 2009 -- Microchip Technology, Inc. has announced three new families of low-power, high-precision operational amplifiers (op amps), giving the company an extensive offering of high-precision op amps with gain bandwidth product (GB ... read more |
| Calypto Delivers Automated Tool for Memory Power Optimization |
June 22, 2009 -- Calypto Design Systems, Inc. has announced the availability of its PowerPro MG (memory gating) tool. The new tool is the first product that automatically generates power-optimized RTL by taking advantage of the low-power ... read more |
| Perfectus Announces SystemVerilog-based OVM Tested ONFi Verification IP for ONFi 2.1 Specification |
June 23, 2009 -- Perfectus Technology, Inc. has announced the availability of the ONFi (Open NAND Flash Interface) Verification IP (VIP) product based on the ONFi 2.1 specification. This SystemVerilog-based, OVM-based ONFi VIP has a Verif ... read more |
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