Page loading . . .

  
 Category: News: News Archive 2009: Saturday, May 25, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 (1811 Entries)
Gemini Selected as Mixed-Signal Verification Solution byadvICo Microelectronics 

June 10, 2009 -- Gemini Design Technology, a start-up company focused on the speed and accuracy of verifying analog and mixed-signal designs, today announced that advICo Microelectronics has standardized on its GSim simulator for use in a ... read more

Cypress Designs Back-Side Illuminated, Digital-Output CMOS Image Sensor for NEC Toshiba Space Systems' Satellite Applications 

June 10, 2009 -- Cypress Semiconductor Corp. has designed a custom back-side illuminated CMOS image sensor for a satellite hyperspectral imaging application from NEC Toshiba Space Systems, Ltd.

Back-side illumination (BSI) increase ... read more

Atmel Upgrades SAM9261S to Higher-frequency SAM9G10 ARM9-Based Embedded Microprocessor 

June 10, 2009 -- Atmel Corp. has announced the release of its SAM9G10 ARM926EJ-S-based embedded microprocessor. The SAM9G10 is an upgrade to the established SAM9261S embedded microprocessor. The SAM9G10 further extends the performance env ... read more

Atmel QTouch Library Now Supports AVR and AVR32 Microcontrollers 

June 10, 2009 -- Atmel Corp. has announced today the new release of the Atmel QTouch Library, a royalty-free software library providing access to the QTouch technology. Without the need for external devices, the QTouch Library adds capaci ... read more

Apache's Power and Noise Integrity Solutions Certified to Support TSMC's Unified Interconnect Modeling Format 

June 10, 2009 -- Apache Design Solutions, Inc. today announced that the company’s RedHawk has been certified to support TSMC’s iRCX 65-nm and 40-nm technologies. In addition, RedHawk is included in the TSMC Integrated Sign-off Flow, a pre ... read more

ARM Utilizes eASIC Devices to Validate Cortex-A9 MPCore Multicore Processor-Based Devices 

June 10, 2009 -- eASIC Corp. today announced that ARM has successfully validated its next-generation Cortex-A9 MPCore multicore processor using eASIC’s Nextreme NEW ASICs. With Nextreme, ARM was able to perform at speed verification with ... read more

Synfora Introduces PICO Extreme Power for Low-Power Applications 

June 10, 2009 -- Synfora, Inc. has announced PICO Extreme Power to reduce power consumption. The new PICO Extreme Power is the first algorithmic synthesis tool to automatically minimize power consumption at the system-level based on a var ... read more

Magma's QuickCap NX Certified to Support TSMC iRCX Format for 40-nm Processes 

June 10, 2009 -- Magma Design Automation, Inc.'s QuickCap NX has been certified to support the parasitic extraction and modeling-accuracy requirements of the TSMC iRCX format for ICs targeting 65-nm and 40-nm processes. With the consisten ... read more

TSMC Selects Azuro's Low Power CTS Tool for Integrated Sign-Off Flow 

June 10, 2009 -- Azuro, Inc. has announced the inclusion of its PowerCentric low power clock tree synthesis tool in TSMC's new Integrated Sign-Off Flow. The Integrated Sign-Off Flow is an automated RTL to GDSII chip implementation flow th ... read more

Jazz Semiconductor Achieves ISO/TS 16949 Automotive Quality Management System Certification 

June 10, 2009 -- Jazz Semiconductor, a Tower Group Company, nowhas ISO/TS 16949 certification, the highest international quality standard for the automotive industry. This represents a critical milestone in the company’s strategic roadmap ... read more

Sidense OTP Memory IP Enables SpectraLinear Non-Volatile Programmable PC Clock Family 

June 9, 2009 -- Sidense Corp. and SpectraLinear, Inc. today announced that Sidense's 1T-Fuse single-transistor bit cell non-volatile memory macros represented a key component in SpectraLinear's recently announced PC EProClock progr ... read more

Cadence QRC Full Chip Extractor Qualified for TSMC's Interoperable (iRCX) Format for 65- and 40-nm Design 

June 9, 2009 -- Cadence Design Systems, Inc. announced today that the Cadence extraction signoff technology has adopted a new interoperable data format, iRCX, developed by Taiwan Semiconductor Manufacturing Company (TSMC). This iRCX file ... read more

TSMC Selects Synopsys Galaxy Implementation Platform for Integrated Sign-off Flow 

June 9, 2009 -- Synopsys, Inc. today announced that TSMC has selected Synopsys' Galaxy Implementation Platform for itsr new Integrated Sign-Off Flow. The deploys the advanced optimization technologies of Synopsys' Design Compiler synthes ... read more

TSMC Selects Legend's Model Diagnoser for Standard Cell Library Quality Assurance 

June 9, 2009 -- Legend Design Technology, Inc. today announced that its Model Diagnoser has been selected by TSMC for use in the quality assurance of the company’s standard cell libraries. With the advantages of exhaustive coverage, full ... read more

TranSwitch Integrates Tensilica Xtensa Processors Into Its Atlanta 2000 Gigabit-Rate Communications Processor 

June 9, 2009 -- Tensilica, Inc. today announced that TranSwitch Corp. has integrated two Xtensa customizable Dataplane Processor Units (DPUs) into its recently introduced Atlanta 2000 gigabit-rate communications processor product f ... read more

Infineon Technologies Achieves Successful Tapeout of Automotive MCU Using Synopsys IC Compiler with Zroute Technology 

June 9, 2009 -- Synopsys, Inc. today announced that IC Compiler with Zroute technology drove silicon success for automotive microcontrollers of Infineon Technologies AG. IC Compiler's Zroute provided a near 100% redundant via rate, enabli ... read more

PixArt Takes ARC License as a Platform for Image Processing Solutions 

June 9, 2009 -- ARC International announced today that PixArt Technologies has taken a license for a member of the ARC 600 core family as its platform for imaging processing in a wide variety of high-growth image application markets. The ... read more

GDA Technologies Joins Power.org Community 

June 9, 2009 -- Power.org has announced that GDA Technologies, Inc. has joined Power.org as a Participant member. GDA Technologies will take an active role in developing a platform standard for collaborative hardware and software s ... read more

Fujitsu Releases Full HD H.264/MPEG-2 Encoder/ Transcoder ICs 

June 9, 2009 -- Fujitsu Microelectronics Europe (FME) has announced its latest solutions in the form of two IC packages for encoding and transcoding between Full High-Definition (HD) H.264 and MPEG-2 streams. The MB86H57 and MB86H58 encod ... read more

Faraday Technology Reduces IC Power Consumption and Cuts Design Time Using Cadence Low-Power Solution 

June 9, 2009 -- Cadence Design Systems, Inc. today announced that Faraday Technology Corp. has utilized the Common Power Format (CPF)-enabled Cadence Low-Power Solution to successfully tape out more than 20 low-power chip designs.

B ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.589  3.714844