January 1, 2009 -- If youíre a digital designer, there is a high likelihood that you have used Double Data Rate (DDR/ DDR2/ DDR3) memories in your designs ó they are cheap and fast. Unfortunately, youíve also probably discovered that verifying the razor-thin timing margins of these interfaces is very complex. With DDR2 pushing 1066 MT/s and DDR3 scheduled for 1600MTps, we face the demands of picosecond resolution, including derating adjustments to measured delay numbers based on the shape of the receiver waveforms. This is important stuff!
This kind of problem begs for a computerized solution. Donít get me wrong, to an experienced engineer, no single measurement is too complicated; rather, with DDRx, itís the shear number of possibilities to consider that makes complete manual verification virtually impossible. Fortunately, tools can be built to automate this tedious process and make it possible for any system designer to confidently and efficiently verify DDRx interfaces before committing to PCB prototypes.
In a recent survey of tool users, the second most important issue for engineers performing analysis was setup time and complexity. The most important issue is now ó and always has been ó modeling: finding or creating IBIS models. Even the effort of setting up for DDRx analysis can be eased by using a well-established and proven process of parameter-gathering user interviews, which ensure that every required step is understandable and completed. Just as important is ensuring that every non-required step is eliminated.
By Dave Kohlmeier. (Kohlmeier is Product Line Director for Mentorís PCB Analysis Tools, including HyperLynx, ICX and Quiet Expert.)
This brief introduction has been excerpted from the original copyrighted article.
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