|Publication: Design & Reuse|
Contributor: Synopsys, Inc.
August 27, 2009 -- Over the course of the last decade, the cost of software has become the undisputed dominant factor in electronics design. Software development has fundamentally changed the shape of the electronics industry, from large integrated device manufacturers (IDMs) to a complex disaggregated design chain of heavily interacting companies. Hardware intellectual property (IP) providers deliver blocks and subsystems to semiconductor companies, who in turn deliver chips and board subsystems to system houses who increasingly seek differentiation through software. All of the hardware-related players interact with software providers who create everything from low level drivers to complex end-user applications.
This article analyzes the root causes of escalating software development effort. It will highlight software driver development, specifically for traditional intellectual property (IP) models like USB, PCI-e, SATA and DDR, as a key factor in time-to-market results for combined hardware/software products. The article will outline how higher abstraction layers of the hardware allow some areas of software development (i.e., drivers, middleware and OS's) to become largely independent of the target hardware architecture.
We will introduce virtual platforms and FPGA prototypes as key ingredients to expedite the availability of suitable development targets for software development and software driven hardware verification. We will outline the importance of IP models and different views for them at the implementation and transaction level, detailing how going forward specifically TLM views of the IP will be required as part of the actual selling process. Using the example of the Synopsys DesignWare High-Speed USB On-the-Go (OTG) controller, we will show how the specific challenges for software driver development productivity – early availability, visibility and control - can be addressed using virtual platforms and applied to other complex IP blocks.
By Frank Schirrmeister, Sam Tennent and Markus Willems. (Schirrmeister, Tennent and Willems are all with Synopsys, Inc.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the Design & Reuse website.
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|Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, EDA, EDA tools, electronic design automation, IP, intellectual property, cores, virtual platforms, Synopsys, Design & Reuse, |
|590/29581 8/27/2009 6441 239|