| SpiritEd: A Register Specification System integrating IP-XACT and Adobe FrameMaker by Design & Reuse |
June 18, 2009 -- Current specification flows often use standard text processors to capture formal register and memory map information of hardware designs along with other less formal types of specification text. Extracting derived models or docu ... read more |
| EDA Remains the Enabler of Much-Needed Innovation by Electronic Design Magazine |
June 18, 2009 -- Some years ago, the Electronic Design Automation Consortium (EDAC) adopted the phrase "Where Electronics Begins" as a tagline. Coined by Richard Goering during his EE Times days, the phrase remains more than apt for EDA.
... read more |
| Power vs. Performance: The Ultimate DSP Design Challenge by Octasic, Inc. in DSP-FPGA |
June 15, 2009 -- For years, DSP designers have tackled the task of providing high-performance chips, in a small footprint, with maximum flexibility and software programmability.
Recently, the pace of performance improvement has slowed at t ... read more |
| Design Techniques for FPGA Power Optimization by Actel Corp. in DSP-FPGA |
June 15, 2009 -- A variety of factors – from the micro to the macro, from conserving battery life to lessening global warming – has pushed power conservation rapidly up the list of system designers’ concerns. Engineers have ranked power consumpt ... read more |
| Designing Portability Into Silicon IP by Snowbush IP Group in EDN Magazine |
June 11, 2009 -- Designing IP (intellectual-property) cores that you can port to various foundry protocols or process geometries is paramount in today's highly diverse standards-based-IP technologies. This technological advantage allows IP-core ... read more |
| Troubleshooting a Transaction-Level Model by JEDA Technologies, Inc. in EDN Magazine |
June 11, 2009 -- The goal of OSCI (Open SystemC Initiative) TLM (transaction-level modeling) 2.0 is to enable high-level component models to simply plug into and play with each other in a system model. The standard identifies modeling styles, se ... read more |
| USB 3.0: A Simple Idea Full of Challenges by EDN Magazine |
June 11, 2009 -- Super-speed USB (Universal Serial Bus) 3.0 sounds like a great idea. Just start with widely used, fast, and bulletproof USB 2.0 and graft in the PHY (physical-layer) interface from another common and reliable standard, PCIe (per ... read more |
| Design for Manufacturing Sheds the Hype by Electronic Design Magazine |
June 11, 2009 -- Four to five years ago, the hype surrounding design-for-manufacturing (DFM) technology for advanced system-on-a-chip (SOC) design was near insufferable. At that time, 90 nm was the state-ofthe- art process node and most fabless ... read more |
| Latest Test Solutions Measure Up to Wireless Challenges by Electronic Design Magazine |
June 11, 2009 -- Demand for test solutions in the communications and wireless sector continues to soar. Not only has there been an explosion in the adoption rate of new wireless technologies, but couple that with tough standards, multiple radios ... read more |
| Custom Mixed-Signal ICs Can Be More Economical Than You May Think by EDA Solutions, Ltd. in Electronics Engineer |
June 11, 2009 -- A common misconception is that custom ASICs cost a fortune in non-recurring engineering (NRE) charges and they take many months, if not years, to develop. While this may be true for some digital devices, particularly those based ... read more |
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