March 9, 2010 -- Interra Systems, Inc. has announced integration of its Spice Analyzer with the Variation Designer Platform from Solido Design Automation, Inc..
Solido’s Variation Designer has been specifically developed to address variation challenges at the transistor level to account for global, local, environmental and proximity related variation effects. It uses Spice Analyzer from Interra Systems to read and modify Spice netlists quickly and reliably, which is a key technology that enables Variation Designer’s seamless integration with leading Spice simulators. Using these solutions, users are able to achieve better designs with reduced variation risk in less time. Users have been able to achieve designs with 20% to 100% better area, power, performance, yield and a reduction in variation design time of over 50%.
Spice Analyzer from Interra Systems is architected to provide a common platform for analyzing various Spice variants. Input transistor-level design information can be accessed and edited by available C++ or Python interface of the analyzer for quick integration with user application. Spice Analyzer functionality includes parsing industry standard Spice variations with full semantic checks, customizable flattening, parasitic removal and parameter elaboration.
"We chose Spice analyzer from Interra Systems after careful analysis of all available options," said Amit Gupta, President and CEO of Solido Design Automation. "Interra’s Spice Analyzer has enabled our development team to deploy Variation Designer with higher quality in less time. We are especially satisfied with the responsive support from Interra Systems."
"The Variation Designer solution provides an efficient way for chip designers to analyze, identify and fix the effects of process variations on their designs. It provides automatic capabilities to analyze and identify process variation-related failures," comments Sunil Jain, CEO of Interra Systems.
Go to the Interra Systems, Inc. website to find additional information.