Page loading . . .

  
 Category: News: News Archive 2010: Saturday, May 25, 2013
Wintegra Renews Silicon IP License from Palmchip  
 Printer friendly
 E-Mail Item URL

November 10, 2010 -- Wintegra, Inc. has renewed its license for communication IP (intellectual property) cores from Palmchip Corp. Wintegra's WinPath processor families use Palmchip's I/O cores, designed to interface with various external serial devices. Use of these cores facilitates a faster time-to-market for Wintegra as these cores can be quickly integrated into WinPath chip designs.

Palmchip provides system-on-chip AcurX SOC platforms, IP cores, embedded software and design outsourcing, for embedded and mobile devices. Palmchip technologies can be found on the market today in many mobile and embedded applications. "We are glad that we are part of Wintegra's success. We will continue to provide our customers with cutting edge configurable technologies and services, thus reducing design cost for our customers," says Jauher Zaidi, CEO of Palmchip.

Go to the Palmchip Corp. website to find additional information.

Read more about
Palmchip Corp.
and
Wintegra, Inc.
on SOCcentral.com


Keywords: ASICs, ASIC design, IP, intellectual property, cores, I/O cores, system-on-chip, SoC, Wintegra, Palmchip,
597/32543 11/10/2010 713 121


Designer's Mall
0.3867188



 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.597  0.4726563