Page loading . . .

  
 Category: News: News Archive 2010: Thursday, May 23, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 (1630 Entries)
Altera's Stratix IV FPGAs Pass Interlaken Interoperability Test 

March 8, 2010 -- Altera Corp. today announced its Stratix IV FPGAs passed the Interlaken Alliance's device interoperability testing. Altera certified its high-performance FPGAs interface with third-party components using the Interlaken pr ... read more

Arasan Chip Systems Releases NAND Flash File System Software 

March 8, 2010 -- Arasan Chip Systems, Inc. has announced the release of its NAND Flash File System (FFS) software. This portable NAND FFS complements Arasan's proven ONFI 2.2 .

Arasan's NAND Flash File system abstracts the managemen ... read more

ARM AMBA 4 Specification Maximizes Performance and Power Efficiency 

March 8, 2010 -- ARM today announced availability of phase one of the new AMBA 4 specification, providing increased functionality and efficiency for complex, media-rich on-chip communication. The AMBA specification is the de facto standar ... read more

Carbon Unveils New Generation of ARM Models with Availability of Mali Models 

March 8, 2010 -- Carbon Design Systems, Inc. announced today immediate availability of virtual models for ARM Mali Graphic Processor Units (GPUs). These new models, including the Mali-200 and Mali-400MP, are compiled directly from the AR ... read more

eASIC Announces Immediate Availability of Aeroflex Gaisler's LEON4 Processor 

March 8, 2010 -- eASIC Corp. announced the immediate availability of Aeroflex Gaisler's next generation LEON processor, the LEON4, as part of its eZ-IP Alliance Core Library. LEON4 is a high-performance, 32-bit processor core based on the ... read more

The MathWorks Announces Release 2010a of the MATLAB and Simulink Product Families 

March 8, 2010 -- The MathWorks, Inc. today announced Release 2010a (R2010a) of its MATLAB and Simulink product families. Key in this release are new streaming capabilities for signal processing and video processing in MATLAB, nonlinear so ... read more

Microchip Announces New 8-, 14- and 20-pin Enhanced Mid-Range PIC MCUs 

March 8, 2010 -- Microchip Technology, Inc. has unveiled several new, peripheral-rich 8-bit PIC microcontrollers (MCUs) with active currents of less than 50ľA/MHz and extremely low sleep currents. The PIC12F182X and PIC16F182X (PIC1XF182 ... read more

Landshut Silicon Foundry Chooses ChipStart as Solutions Partner 

March 8, 2010 -- ChipStart, Inc. announced that Landshut Silicon Foundry (LFoundry) has selected ChipStart for foundry services representation globally. With it's 200-mm fab and current core technology on 150nm, LFoundry provides v ... read more

Micrium Supports Actel SmartFusion Devices 

March 8, 2010 -- Micrium today announced that it has successfully ported its uC/OS-II and uC/OS-III kernels and uC/TCP-IP stack to Actel's new SmartFusion intelligent mixed-signal FPGA. Micrium's RTOS family is ideal for the ARM Cortex-M3 ... read more

MIPS Technologies Simplifies Android Application Development with Tools for the MIPS Architecture 

March 8, 2010 -- MIPS Technologies, Inc. today announced availability of new debug and development tools that simplify Android application development. These tools are free-of-charge through the Android on MIPS community. MIPS Technologie ... read more

Nangate Announces 45-nm Open Cell MegaLibrary and Easy Access to Nangate Design Optimizer Evaluation 

March 8, 2010 -- Nangate, Inc. has released the 45-nm Open Cell MegaLibrary to support the existing 45-nm Open Cell Library. MegaLibrary is a new type of standard-cell library containing a very large set of fine-grained cell variants that ... read more

OSCI Completes First Analog/ Mixed-Signal Standard for SystemC-based Design  Featured

March 8, 2010 -- The Open SystemC Initiative (OSCI) today released the SystemC Analog/ Mixed-signal (AMS) extensions language standard, AMS 1.0. The AMS 1.0 standard is the first modeling language targeting system-level design and verific ... read more

Imagination Technologies Adopts XJTAG to Speed Development of SOC Designs 

March 2, 2010 -- Imagination Technologies, Ltd. is using the XJTAG boundary scan development system to accelerate the development of its systems-on-chip designs for customers across the mobile phone, handheld, mobile computing and ... read more

Microchip Announces Higher Memory, Higher Pin-Count Expansion of Enhanced 8-bit PIC MCUs 

March 2, 2010 -- Microchip Technology, Inc. has expanded its Enhanced 8-bit Mid-range core microcontroller (MCU) portfolio with higher memory and pin-count devices featuring nanoWatt XLP technology. The PIC16F19XX MCUs feature a broad ra ... read more

Crack Semiconductor Releases Performance Data for the CS256-ECC and CS1024-PKA Processors 

March 2, 2010 -- Crack Semiconductor's CS1024-PKA processor is able to compute both RSA-1024 and ECC-256 using optimal large-integer modular multiplication and all other required modular arithmetic functions. The CS1024-PKA offers the ... read more

iSine Releases Extreme ECC for NAND Flash SOC's Optimized for ASIC and Xilinx FPGA Implementation 

March 2, 2010 -- iSine, Inc. has announced the full release of its Extreme ECC technology that meets the needs of the most demanding error correction environments. Extreme ECC solutions are generated from parameterized mathematical algori ... read more

AgO Unveils AnXplorer for Analog and RF Circuit Design 

March 3, 2010 -- AgO, Inc, has launched AnXplorer, a new tool for optimizing analog and RF circuits. Starting with an unsized Spice netlist, variables for device dimensions and a set of design objectives and constraints, AnXplorer optimiz ... read more

X-FAB First to Deliver Single-Block Embedded NVRAM as Pure Play Foundry Solution 

March 4, 2010 -- X-FAB Silicon Foundries AG today became the first pure play foundry to offer an embedded non-volatile random-access memory (NVRAM) process feature, leading to a single-chip solution. Combining the benefits of quickly acce ... read more

Agilent Technologies' ADS Software Selected by Paratek Microwave for Antenna Tuning Module Development 

March 3, 2010 -- Agilent Technologies, Inc. today announced that its Advanced Design System (ADS) software has been selected by Paratek Microwave for use in development of tunable antenna modules for the mobile handset market. The accurac ... read more

Real Intent Releases Meridian CDC Version 3.0 

March 3, 2010 -- Real Intent, Inc. is now shipping its Meridian Clock Domain Crossing (CDC) verification software Version 3.0. Meridian CDC is a precise and comprehensive CDC solution employing a multi-strategy analysis approach including ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.597  2.84375