March 16, 2011 -- Jedat, Inc. today announced that the Semiconductor Technology and Academic Research Center (STARC) has certified Amper, Jedat's automatic placement tool for custom LSI, as the area estimation tool for STARC's recommended STARCAD-AMS mixed-signal design flow.

In the evaluation of the functionality of high-accuracy and high-speed area estimation for analog blocks, STARC found that Amper was the tool among several other competitive EDA tools, that sufficiently met STARC's five criteria.

Observance of constraints. Pre-execution operation time of 5 or less minutes. Automatic placement in 5 or less minutes. Accurate placement result. Total placement time including manual correction when necessary.

Amper is capable of estimating the area of analog blocks with high accuracy and at high speeds by observing the placement constraints (symmetry, pair, and alignment) registered in the circuit, and by utilizing its high-accuracy device placement which takes into account the routing area. With this advanced ability, designers can obtain an extremely accurate floorplan result in a very short time. Amper not only improves the efficiency of area estimation and floorplan but reduces re-spins and significantly shortens the total design cycle. Amper can be used by plugging into Cadence's design platform IC6.1.4(OA) as well as running on Jedat's Alpha-SX design platform.

Amper features