October 17, 2011 -- ATopTech, Inc. announced today that Faraday Technology Corp. has adopted ATopTech's Aprisa physical design solution as its tool of choice for physical implementation at advanced process nodes.
Aprisa, ATopTech's advanced netlist-to-GDSII physical implementation tool, consistently demonstrates superior routing ability and excellent timing closure for 40-nm technology. Faraday's extensive evaluation of Aprisa was further validated when Aprisa delivered better design quality and more-predictable design closure with a successful design tape-out in UMC's 40-nm process.
"Complicated physical effects and demanding design specifications present increased challenges for 40-nanometer design projects," said Kun-Cheng Wu, Associate Vice President of Faraday. "We are pleased with the improved quality of results and turn-around time we've gained by adopting Aprisa as our physical implementation tool."
Aprisa is a complete place-and-route engine, including placement, clock tree synthesis, optimization, global routing and detailed routing. The core of the technology is its hierarchical database. Built upon the hierarchical database are common "analysis engines" such as RC extraction, design-rule-checking (DRC) engine, and an advanced, extremely fast timing engine to solve the complex timing issues associated with OCV, signal-integrity (SI) and multi-corner multi-mode (MCMM) analysis. Aprisa uses state-of-the-art multi-threading and distributed processing technology to further speed up the process. Because of this advanced architecture, Aprisa is able to deliver predictability and consistency throughout the flow, and hence faster total turn-around time and best quality-of-results for physical design projects.
Go to the ATopTech, Inc. website to find additional information.