October 18, 2011 -- ARM and TSMC (Taiwan Semiconductor Manufacturing Company) today announced that they have taped out the first 20-nm . The two companies completed the implementation from RTL to tape-out in six months using TSMC's Open Innovation Platform (OIP) 20-nm design ecosystem.
Building on this tape-out, ARM will optimize its physical IP technology to specific TSMC 20-nm process technologies for power, performance and area (PPA), driving the specification of the Cortex-A15 Processor Optimization Pack (POP). TSMC's 20-nm process provides more than a 2X performance increase over preceding generations.
"This first 20-nm ARM Cortex-A15 tape-out paves the way for the next generation of SOC integration and performance," said Mike Inglis, Executive Vice President and General Manager, Processor Division, ARM. "We value the work carried out between ARM, TSMC and its design ecosystem partners to achieve this milestone. The combination of TSMC technology, the latest ARM Cortex-A15 processor and Artisan physical IP will help meet the increasing demand for high performance, energy-efficient consumer devices."
The Cortex-A15 processor's low-power, high-performance and advanced feature set is perfectly suited to 20-nm process implementations. Resulting SOCs will be ideal for a wide variety of markets, including smartphone, tablet, mobile computing, high-end digital home, servers, and wireless infrastructure.
This announcement highlights the continued and increased collaboration between ARM and TSMC. The test chip was implemented using a commercially available 20-nm tool chain and design services provided by the OIP ecosystem and ARM Connected Community partners.
Go to the ARM website to find additional information.