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 Category: News: News Archive 2011: Tuesday, October 25, 2016
Arasan Chip Systems Announces Third-Generation Hardware Validation Platform Family for Mobile Interface Standards  
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December 12, 2011 -- Arasan Chip Systems, Inc. has introduced the third generation of its hardware-validation platform family targeted for validation of hardware and software infrastructure that comply with analog-PHY-based standards for serial connectivity between chips, camera and display modules, and flash storage in mobile platforms. Developers adopting emerging and existing protocols such as MIPI's Unipro, CSI-2 and DSI, JEDEC's UFS and SDA's SD4.0 can now leverage Arasan's platforms to jump-start and speed their pre-silicon, silicon and system validation and applications development.

Arasan's hardware-validation platforms enable early validation of a new interface by emulating the complementary device at the interface-protocol level. Beyond this, it facilitates early application development for reference board designs and production testing, before complementary devices are available in silicon. Further in the product cycle, it acts as a reference platform to help root-cause any incompatibilities between the device under development and the silicon device it is communicating with. Often, a developer of cutting-edge silicon products with new standard interface protocols has no means of validating a design with complementary devices which themselves may be under development. When such complementary devices do become available, a full-speed reference platform that faithfully adheres to the protocol and provides the accompanying software stacks is necessary to aid the bring-up of a device trying to communicate with another for the first time, followed by rapid deployment of reference boards to OEM's and production testing of the OEM's end products.

The previous generations of these platforms address these challenges for interface protocols that require digital interfaces, such as MIPI's SLIMbus and HSI, and SDA's SD3.0. Arasan delivers all these platforms with the hardware and software binaries, with rich run-time-tracing and debug capabilities. The platform family extends these capabilities to complex protocols that require analog PHY layer interfaces such as MIPI's D-PHY and M-PHY, and SDA's UHS-II. UFS and the upcoming MIPI LLI and CSI-3 are based on the MIPI Unipro link protocols, which are complex and multi-layered in both hardware and software.

"With the advent of increasingly complex, high-speed serial connectivity protocols and the related time-to-market challenges, IP vendors need to move beyond silicon tape-out to end-system product enablement. Arasan's hardware validation platforms augment its IP and software stack offering to do precisely that, and now with the third generation we have extended this capability to deliver Total IP Solutions for high-speed serial protocols for mobile applications," said Andrew Haines, Vice President of Marketing at Arasan Chip Systems.


The Hardware Validation Platforms for SD4.0, CSI-2/DSI, Unipro and UFS will be available in Q1 of 2012.

Go to the Arasan Chip Systems, Inc. website to find additional information.

E-mail Arasan Chip Systems, Inc. for more information.

Read more about
Arasan Chip Systems, Inc.

Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, EDA, EDA tools, electronic design automation, verification, Arasan Chip Systems,
600/36399 12/12/2011 1099 141
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