February 24, 2011 -- ARM has announced immediate support for the Freescale Semiconductor, Inc.'s i.MX53 family of multimedia applications processors in the ARM Development Studio 5 (DS-5) and the DSTREAM target connection unit.
| Duolog Extends Solutions to Support EDA360 Vision in Collaboration with Cadence |
February 24, 2011 -- Duolog Technologies today announced that its Socrates Chip Integration Hub leverages a multi-standards-based methodology enabled through close collaboration with Cadence Design Systems, Inc. Socrates ... read more |
| Faraday Picks Silicon Frontline's F3D for Accurate Post-Layout 3D Extraction of ADCs |
February 24,2011-- Silicon Frontline Technology, Inc. announced today that after an extensive evaluation of post-layout verification tool offerings, Faraday Technology picked Silicon Frontline's F3D for its accurate 3D extraction. The hig ... read more |
| MIPS Technologies Signs License to Distribute OEM Version of Imperas Open Virtual Platforms Simulator |
February 24, 2011 -- Imperas, Ltd. today announced that MIPS Technologies, Inc. has licensed an OEM version of the OVPsim simulator to provide a fast, instruction accurate simulation product to its licensees.
The ... read more |
| MOSAID Introduces HLNAND2 Flash Memory Specification |
February 24, 2011 -- MOSAID Technologies, Inc. today announced HLNAND2, a key step in the development of the company's HLNAND (HyperLink NAND) Flash memory architecture and interface. Optimized for mass storage applications, including ent ... read more |
| Kozio Announces Support for Freescale's QorIQ P1 Platform Series |
February 24, 2010 -- Kozio, Inc. today announced the expansion of its In-System Diagnostics (ISD) solution to support Freescale Semiconductor, Inc.'s QorIQ P1 Platform Series, which includes the P1021 (dual-core) and P1012 (single ... read more |
| Oasys Design Systems Enhances Chip Synthesis with Power Capabilities |
February 24, 2011 -- Oasys Design Systems today unveiled the latest version of its Chip Synthesis platform with enhanced capabilities that include chip-level power analysis and the ability to re-synthesize a design from the register trans ... read more |
| Atmel Optimizes QTouch Architecture for Touch Application-Specific Devices |
February 23, 2011 -- Atmel Corp. today announced a new family of QTouch capacitive touch controllers for implementing button, slider and wheel (BSW) functionality on application-specific devices. The new Atmel AT42QT1070 and AT42QT2120 de ... read more |
| IMS CHIPS Standardizes on Cadence Silicon Realization Product Line for Advanced Gate Array Design |
February 23, 2011 -- Cadence Design Systems, Inc. today announced that IMS CHIPS has adopted Cadence Silicon Realization technologies for its special mixed-signal gate array technology. IMS CHIPS plans to deploy Cadence end-to-end ... read more |
| DMAP and MoreThanIP Announce Strategic Partnership on D0-254 Ethernet Technology for Safety-Critical Systems |
February 23, 2011 -- DMAP and MoreThanIP GmbH today announced a strategic partnership to make available MoreThanIP's intellectual property (IP) with DO-254 certification package. This partnership enables the introduction in the mil ... read more |
| TI and MIT Develop 0.6-V DSP in 28-nm Process |
February 22, 2011 -- Texas Instruments, Inc. (TI) and the Massachusetts Institute of Technology (MIT) today presented a joint research paper detailing design methodologies for a 28-nm mobile applications processor at the 2011 Internationa ... read more |
| Broadcom Expands Use of Cadence Verification Computing Platform |
February 22, 2011 -- Cadence Design Systems, Inc. today announced that Broadcom Corp. is expanding its use of the Cadence Verification Computing Platform, Palladium XP, to help validate its complex system designs before committing them to ... read more |
| Real Intent Adds Significant New Design Productivity Features to Ascent Lint |
February 22, 2011 -- Real Intent, Inc. today announced the immediate availability of Ascent Lint Version 1.4. Version 1.4 includes new functionality to improve design productivity and the comprehensiveness of rule checking.
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