January 31, 2012 -- Xilinx, Inc. has launched its first Targeted Design Platforms for accelerating systems development and integration with its 28-nm 7 series FPGAs. Xilinx's Targeted Design Platform approach to FPGA system design and integration provides the industry's most comprehensive development kits, complete with boards, ISE Design Suite tools, IP cores, reference designs and FPGA Mezzanine Card (FMC) support.

Since the first Kintex-7 devices were shipped in March 2011, Xilinx has commenced the roll out of its Kintex-325T, Virtex-485T, Virtex-2000T FPGAs and Zynq-7020 Extensible Processing Platform. The three new kits are the first among nearly 40 to be delivered by Xilinx and/or ecosystem members supporting embedded and high-speed connectivity applications, as well as markets such as automotive, broadcast, consumer, industrial and communications. Reference designs that come with each kit give both new and experienced FPGA users ideal starting points for getting designs completed quickly while achieving the best performance, lowest power, highest bandwidth and most feature-rich utilization of Xilinx FPGAs.

Each development kit supports the FMC specification, a key Targeted Design Platform enabler defined by VITA 57 that delivers an industry-standard daughter card form factor, connector and modular interface to an FPGA located on a base board. Whether the cards are custom made or commercial-off-the-shelf (COTS) from the Xilinx ecosystem, developers can leverage 100's of existing FMCs immediately, or reuse their investments in cards targeting previous generation Virtex-6 and Spartan-6 devices.

In addition to the open standards supported at the board level, Xilinx's adoption of the AMBA AXI4 (Advanced eXtensible Interface 4) standard enables plug-and-play use and reuse of intellectual property (IP) cores to further accelerate productivity. Using the PlanAhead design planner available in the ISE Design Suite, developers have a unified design process for logic, DSP and embedded processing that simplifies the IP assembly process and promotes team design with hierarchical flows within the FPGA.

About the new kits