March 27, 2012 -- Analog Bits, Inc. has unveiled a new cable-specific SerDes IP specifically targeting the cost-sensitive, yet performance demanding consumer cable market. The latest addition to the Analog Bits SerDes IP product line lets designers use low-cost cables with SerDes at either end to recover and re-time the signal and has been demonstrated with multiple cables including FFC ribbon, Micro-Coax and Dual-Coax.
The pin-configurable macro uses standard CMOS logic process devices and exhibits exceptional input sensitivity, jitter tolerance and sophisticated equalization. Its low pin count, low power and compact form factor (0.095 mm² active silicon area per lane) make it suitable for a variety of flip-chip and wire-bond packages embedded in connectors. The serial client interfaces can connect directly to SFPs and operate over a wide range of frequencies from 125Mbps up to 12.5Gbps.
Analog Bits' Programmable SerDes provides a Physical Media Attachment (PMA) Layer capable of signaling at multiple data rates and supports multi-protocol market needs including a wide range of AC-coupled high-speed serial communication standards requiring serial Clock Data Recovery (CDR)..
The PMA can be integrated with the available PCS to provide a PCI-Express Gen1/ Gen2/ Gen3 PHY solution, and has interface capability to allow integration with other customer-designed serial protocol PCS layers.
