March 28, 2012 -- Synopsys, Inc. announced today that its collaboration with the members of the Interconnect Modeling Technical Advisory Board (IMTAB) of the IEEE Industry Standards and Technology Organization (IEEE-ISTO) has resulted in a parasitic-variation-modeling solution to address the effects of double-patterning technology (DPT), targeted for use in 20-nm IC manufacturing.
The new DPT-model extensions will be available to the EDA and semiconductor industries through the open-source licensed Interconnect Technology Format (ITF) version 2012.06 ratified by IMTAB members, including Apache Design, GlobalFoundries, NVIDIA, Synopsys and others.
DPT is a critical technique for ensuring printability of device and interconnect layers in 20-nm IC manufacturing. However, splitting layers into two masks can introduce timing variations as a consequence of mask misalignment in the manufacturing process. To enable successful 20-nm design tape-outs and manufacturing, the IMTAB members determined that a DPT-aware modeling solution for parasitic extraction was needed to account for the timing impact and address it in the physical implementation and signoff design flow.
"The real challenge was developing a solution that accurately modeled the impact on timing with no productivity change to the flow," said Bari Biswas, chair of IMTAB and Senior Director of Engineering for extraction solutions at Synopsys. "While working with IMTAB and leading foundries, Synopsys developed a novel modeling technique that eliminates the need to insert the time-consuming coloring step during the implementation and sign-off flow, with negligible impact on extraction runtime."
"The manufacturing requirements at advanced process nodes, such as double-patterning lithography at 20-nanometers, are driving an industry-wide, intensive focus on newer parasitic modeling techniques to achieve sign-off accuracy and performance," said Richard Trihy, Director of Design Methodology at GlobalFoundries. "Our close collaboration with IMTAB member companies has resulted in several enhancements to ITF modeling at the 28-nanometer node, and GlobalFoundries is now driving silicon-validation of the latest DPT modeling at the 20-nanometer node."
In addition to DPT modeling, IMTAB has also approved enhanced trench-contact device-modeling extensions in the ITF to include evolving 20-nm characteristics. The trench contacts are used for local device interconnections that improve density and lower resistance. However, additional challenges are introduced in modeling co-vertical conductors and associated large fringe capacitances. To deal with these issues, specific 20-nm extensions were added to explicitly model silicon dielectric underneath the device and the special dielectric region between the gate and raised diffusion to enable accurate modeling of the new parasitic effects.
Synopsys' Interconnect Technology Format (ITF) provides detailed modeling of interconnect parasitic effects that enables designers to perform accurate parasitic extraction for timing, signal integrity, power and reliability sign-off analysis. ITF offers a flexible format to accurately model the effects of increased process variation at advanced process technologies. Proven on thousands of production designs, ITF has been evolving for more than 10 years and is the semiconductor industry's most widely used interconnect-modeling format. It is supported by leading semiconductor foundries, integrated device manufacturers and EDA tool providers.
The ITF format can be licensed for no charge through Synopsys' Technology Access Program (TAP-in).
To further advance interoperability in the industry, Synopsys is sponsoring an Interconnect Technical Advisory Board (IMTAB) with broad industry participation to shepherd the development of its ITF format as an interoperable interconnect parasitic modeling format. The IMTAB will develop, review and vote on extensions to the ITF format that are seen as beneficial to the industry.
The IMTAB site provides the latest news and information regarding the ITF format and the IMTAB.
Participation in IMTAB is restricted to members only. Current members include Altera Corporation, AMD, Apache Design Solutions, GlobalFoundries, LSI, Magma Design Automation, NVIDIA, Qualcomm, STMicroelectronics and Synopsys.
Go to the Synopsys, Inc. website to find additional information.