June 27, 2012 -- Integre Technologies LLC today announced the release of the IP-HyperLink high-speed DSP-interface core for both Altera and Xilinx device families.

The Integretek IP-HyperLink FPGA core provides a high-speed extension of the AXI interface over a serial connection between a custom FPGA and Texas Instruments, Inc.'s TMS320C66x multicore DSPs. The Integretek IP-HyperLink core leverages TI's proven HyperLink technology to ensure compatibility with TI's KeyStone-based multicore processors. Developers supplementing TI's KeyStone devices with proprietary FPGA implementations will benefit from KeyStone's HyperLink, a dedicated chip-to-chip interface.

Key features of the IP-HyperLink FPGA core

"The IP-HyperLink FPGA core is the first product in our new line of high speed SERDES I/O core family," states Fred Rakvica, Integre Managing Partner.

Availability

The IP-HyperLink core is currently available for design-in.

Posted by: John Miklosz