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 Category: News: News Archive 2012: Monday, May 20, 2013
Xilinx Integrated Block for the PCI Express Gen3 Standard Accelerates Productivity and Increases System Performance  
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June 27, 2012 -- Xilinx, Inc. today announced its solution for designs using the Virtex-7 FPGA integrated block for PCI Express x8 Gen3 with DDR3 external memory, providing developers with all the building blocks needed to get started on PCI Express Gen3-based designs immediately. The Xilinx integrated blocks for the PCI Express Gen3 standard, along with support for 1866-Mbps high-speed memory interfaces in mid-speed grade devices, allow users to design systems that meet high system-bandwidth requirements needed in communications, storage, server applications, and more.

Xilinx allows users to accelerate productivity by offering maximum memory data rates in its mid-speed grade devices as well as built-in capabilities in its Virtex-7 XT devices for single-root I/O virtualization and multi-function end points to address the emerging needs in data center and cloud computing.

"Xilinx enables the highest productivity levels with industry-leading transceiver technology that provides automated-tuning capabilities to quickly bring up a functioning link, including auto-adaptive Decision Feedback Equalization (DFE)," said Ketan Mehta, Xilinx PCI Express Product Manager. "This dramatically accelerates development time by simplifying the set up and use of the high-speed serial transceivers that support the PCI Express Gen3 standard."

Virtex-7 XT and HT FPGAs are the first generation of Xilinx All Programmable devices that integrate hard IP cores for the PCI Express Gen3 standard. Both Kintex-7 and Virtex-7 FPGAs feature 1866-Mbps DDR3 external memory interfaces to further bolster the PCI Express system throughput. Xilinx's PCI Express Gen3 video demonstrates the integrated block operating on a Virtex-7 X690T FPGA with an off-the-shelf PCI Express Gen3 system.

For designs that do not use an integrated block for the PCI Express Gen3 standard, soft IP core support is available through Xilinx Alliance Program members, including Northwest Logic and PLDA.

Availability

All the elements needed for PCI Express x8 Gen3-based designs are now available, including the Virtex-7 X690T FPGA with an integrated PCI express block, ISE Design Suite 14.1 software tool support, a DMA engine provided by third-party Xilinx Alliance Program members, and a 1866-Mbps DDR3 external memory interface.

Posted by: John Miklosz



Go to the Xilinx, Inc. website to find additional information.

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Keywords: FPGAs, field programmable gate arrays, FPGA design, IP, intellectual property, cores, PCI Express, PCIe, Xilinx,
601/38766 6/27/2012 448 65


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