July 30, 2012 -- Digital Core Design has introduced the newest hardware implementation of a media access control protocol, defined by the IEEE standard. The DMAC-RMII, in cooperation with an external PHY device, enables network functionality in design. This IP core supports 10BASE-T and 100BASE-TX/ FX IEEE 802.3-2002 compliant RMII PHYs.

The DMAC-RMII Core is able to work with the most popular processors available on the market, either 8-, 16- and 32-bit data bus, with little or big endian byte-order format. Moreover, it provides static configuration of PHY IC, conforming to the IEEE 802.3-2002 standard. The design is strictly synchronous with positive-edge clocking, no internal tri-states and with a synchronous reset.

The IP core has a Reduced Media Independent Interface (RMII) for connection to external 10/100-Mbps PHY transceivers, which ensures maximum compatibility with a great variety of external CPUs or standard bus controllers.The DMAC-RMII is compatible with most-modern virtual-component interfaces. In addition, AMBA, OCP, OPB and other optional standard interfaces are available, which makes the core a flexible solution to be utilized in a variety of interface applications, including network devices (e.g., network interface cards, routers, switching hubs, etc.), embedded-microprocessor boards, communication systems and other systems-on-chip (SOC) applications.

DMAC key features

Posted by: John Miklosz