July 31, 2012 -- GOEPEL electronic GmbH has developed a dedicated VarioTAP model library for the Cypress Semiconductor Corp. PSoC3 programmable system-on-chip series. VarioTAP is a universal processor-centric emulation technology for programming, testing and design validation. The solution enables the onboard programming of the PSoC3 devices at system level throughout the entire product life cycle.

The user benefits are significant increases in programming efficiency and savings in additional investments for other test and programming equipment. The libraries, described as VarioTAP models, are structured modularly as intelligent IP, enabling a complete fusion of programming and test via processor debug interfaces and other technologies such as boundary scan or chip-embedded instruments on a single platform.

The Cypress PSoC3 are true programmable system-on-chip devices combining high precision analog units with flexible digital peripheral, ultra-low power, embedded processing and PLD-based logic. Programming of the embedded Flash and debugging can be executed via the JTAG interface or the SWD interface.

VarioTAP enables the reconfiguration of the integrated processor into a native embedded test and programming controller via the JTAG debug port. The IP contains all necessary functions to control the entire execution and for matching the stringent timing requirements. The use of VarioTAP does not require expert background knowledge, additional development tools or processor-specific pods, which makes the handling easy and uncomplicated.

The new VarioTAP IP models are supported in the Cascon Galaxy development and execution software starting from version 4.6.0, and are activated by the licence manager in the system software. The utilization of the respective VarioTAP models is free of charge for current customers with valid software-maintenance contracts.

Posted by John Miklosz