Page loading . . .

  
 Category: News: News Archive 2012: Thursday, May 23, 2013
Sort Entries by    
Use the input form on the right to search on a word or phrase.  
Page(s): 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 (1336 Entries)
Axelsys Launches Sustaining Engineering Services 

August 28, 2012 -- Axelsys LLC today announced the formal launch of tailored Sustaining Engineering Services. Axelsys has created a program that is designed to relieve overworked, under-manned engineering teams meet their organization's n ... read more

ARM and Synopsys Expand Collaboration for ARM Technology-based SOCs  Featured

August 28, 2012 -- ARM and Synopsys, Inc. have signed a multi-year agreement that expands Synopsys' access to a broad range of ARM intellectual property (IP). The two companies will broaden their collaboration to enable SOC designe ... read more

Acceleware and Altera Join Forces to Offer OpenCL Training for FPGAs 

August 28, 2012 -- Acceleware, Ltd. is partnering with Altera Corp. to deliver specialized OpenCL (Open Computing Language) training to Altera's customers who are adopting this open standard language to program its FPGAs. The dedic ... read more

MSC Embedded Announces Qseven Module with Media Processor for Imaging Applications 

August 28, 2012 -- MSC Embedded, Inc. today announced its compact Qseven MSC Q7-TI8168 module in a new, higher-performance variant with a DaVinci DM8168 digital media processor by Texas Instruments, Inc. (TI). The processor integrates an ... read more

STATS ChipPAC Advances TSV Capabilities with the Qualification of 300-mm Mid-End Processing and Low-Volume Manufacturing 

August 28, 2012 -- STATS ChipPAC, Ltd. today announced that its through-silicon-via (TSV) capabilities have achieved a new milestone with the qualification of its 300-mm mid-end manufacturing operation and transition to low-volume manufac ... read more

Lattice Announces Promotional Pricing for iCEblink40 Evaluation Kits 

August 27, 2012 -- Lattice Semiconductor Corp. today announced promotional pricing for its recently released iCEblink40 Evaluation Kits. The iCE40 mobileFPGA family, fabricated on non-volatile 40-nm technology, is optimized for consumer a ... read more

HDL Design House Appoints N.R.G. Technologies Its Representative for Israel 

August 27, 2012 -- HDL Design House has named N.R.G. Technologies its representative for Israel. N.R.G. Technologies, Ltd.'s principal aim is providing semiconductor companies in Israel with the most advanced technologies available, by of ... read more

Agilent Technologies Ships New Software for Generating and Qualifying Spice Models 

August 27, 2012 -- Agilent Technologies, Inc. has announced shipment of its first release of the Spice modeling tools it obtained through the acquisition of Accelicon Technologies in February. The tools, Model Builder Program (MBP), Model ... read more

Arasan Chip Systems Announces Fast SD3.0-Compliant Hardware-Validation Platform 

August 23, 2012 -- Arasan Chip Systems, Inc. has announced the availability of what the company says is the industry fastest SD 3.0-compliant hardware-validation platform for engineering and product development of SD 3.0 devices with UHS- ... read more

Digital Core Design's DoCD Provides On-Chip Debugger Via USB 

August 23, 2012 -- SOC designers face the problem of inaccessibility of important control and bus signals that often lay behind the physical pins of the device. On-chip debug tools for verification and software debugging get around this limitati ... read more

GOEPEL electronic Opens SCANFLEX Platform for Embedded System Access for Third-Party Applications  

August 23, 2012 -- In cooperation with selected partners of the GATE alliance program, GOEPEL electronic GmbH has developed a comprehensive application programming interface (API) for the company's SCANFLEX hardware platform. The API prov ... read more

Avery Design Systems Announces SCSI Express (SOP/PQI) Verification IP Solution 

August 22, 2012 -- Avery Design Systems, Inc. today announced availability of its SCSI-Xactor verification IP targeting SCSI Express for high-performance PCIe-based SSDs.

SCSI-Xactor is based on the standards work of INC ... read more

Intel Signs $20 Million Multi-Year License Agreement for Sonics System IP for SOC Platform Initiatives 

August 22, 2012 -- Sonics, Inc. today announced that Intel Corp. has licensed key IP components from Sonics portfolio of system IP for use in its SOC platforms incorporating the Intel Atom processor. Intel will work with Sonics to securel ... read more

Tehuti Networks Selects Kilopass Non-Volatile Memory IP for Its TN4010 Single-Port 10GbE Controller 

August 22, 2012 -- Kilopass Technology, Inc. today announced that Tehuti Networks, Ltd. has selected the XPM (eXtra Permanent Memory) non-volatile memory (NVM) intellectual property (IP) core for its latest TN4010 single-port 10GbE ... read more

Adapteva Announces Availability of OpenCL SDK for Epiphany Multicore Architecture 

August 22, 2012 -- Adapteva is providing an early access release of its OpenCL SDK for the Epiphany multicore architecture. The OpenCL implementation was completed together with Brown Deer Technology, LLC.

OpenCL ( ... read more

intoPIX JPEG2000 Technology Integrated in Leonis Cinema's new CineMaster-Pro DCP Creator 

August 22, 2012 -- intoPIX s.a. and Leonis Cinema, a major equipment provider for the digital cinema industry in Asia, today announced their strategic collaboration in the CineMaster-Pro DCP creator produced by Leonis Cinema. ... read more

The Portland Group Updates Its OpenCL Compiler for Multicore ARM 

August 21, 2012 -- The Portland Group, Inc., a wholly-owned subsidiary of STMicroelectronics, today announced the release of PGCL 12.7. PGCL is the PGI OpenCL framework for multicore ARM-based SOCs, currently available on ST-Ericsson Nova ... read more

iD Corporation Adopts Mentor Questa CDC for Clock-Domain-Crossing Verification 

August 21, 2012 -- Mentor Graphics Corp. today announced that iD Corp. has selected Questa CDC for clock-domain-crossing verification of its complex SOC and FPGA designs. iD, which develops ICs for network and wireless communications, ado ... read more

Marvell Announces General Availability of PCIe-based DragonFly Platform for Servers and Storage Systems 

August 21, 2012-- Marvell today announced general availability of the Marvell DragonFly platform, featuring DragonFly NVRAM and DragonFly NVCACHE. DragonFly is the storage industry's first intelligent NVRAM SSD accelerator; essentially a ... read more

Kozio Offering 30-Day Free Trial of VTOS for Freescale P1010 RDB and P1022DS 

August 21, 2012 -- Kozio, Inc. today announced availability of a 30-day free trial of its Verification and Test OS (VTOS) for users of Freescale Semiconductor, Inc.'s P1010 RDB and P1022DS development boards. Kozio's VTO ... read more




 Search for:
            Site       Current Category  
   Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
183.601  2.439453