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 Category: Magazine & Journal Articles Online: Article Archive 2012: Tuesday, May 21, 2013
Design Sallen-Key Low-Pass Filters Above 1; Achieve Lower Output Noise  
Publication: EDN Magazine
Contributor: Intersil Corp.
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April 9, 2012 -- It is common to see higher-order, multistage, Sallen-Key filters designed with each stage at a gain of 1. This has component-sensitivity advantages, but always produces significant noise-gain peaking within the filter stages themselves for the higher-Q stages. While it often might be the case that the SNR is already defined by the input signal before it hits an active filter stage, if the same filter response can be achieved, and produce considerably lower noise contribution to the signal path, why not?

A detailed analysis of the noise gain response within the Sallen-Key stage exposes this noise gain-peaking issue and shows it only takes a slight increase from a gain of 1 to get a significant drop in noise peaking, thus reducing the output integrated noise due to the filter stage itself.

This lengthy and detailed article, complete with numerous figures, equations, and analyses, will benefit anyone who is looking to optimize noise performance. It is presented as a single document in Word format.

By Michael Steffes. (Steffes is Senior Applications Manager, Intersil Corp.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EDN Magazine website.

Read more about
Intersil Corp.
on SOCcentral.com

Keywords: embedded system design, embedded systems, filter design, Sallen-Key filters, EDN Magazine, Intersil
602/38254 4/9/2012 366 74


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