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 Category: Magazine & Journal Articles Online: Article Archive 2012: Monday, May 20, 2013
Early and Accurate Power Analysis: Myth or Reality?  
Publication: EE Times EDA Designline
Contributor: Apache Design Solutions, Inc.
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April 11, 2012 -- Power is receiving a mounting share of attention. Innovation, fueled by the information and Internet age, poses new challenges for electronic systems across a spectrum of applications. To address these challenges, power-related design decisions are now being made throughout the product-development cycle. Yet it is the early decisions that primarily govern the power and energy profile of a product.It is not surprising that key choices include how the design is partitioned into hardware versus software, the design architecture, and even to determine how the software controls the hardware. Once the design architecture is locked in, the most power-efficient implementation may lose out to an alternative more power-efficient architecture, even if the alternative is implemented half as well.

If the impact on power reduces when you go down levels of design abstraction, then predicting power with accuracy is the challenge at the higher levels of abstraction. It is unreasonable to expect the power numbers from a mostly untimed transaction-level design model to closely match numbers from a post-implementation design representation. At the same time, early power numbers must offer sufficient accuracy to evaluate design trade-offs relevant to the design abstraction level.

 

By Preeti Gupta. (Gupta is Director RTL Product Management, Apache Design, Inc.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times EDA Designline website.

Read more about
Apache Design Solutions, Inc.
on SOCcentral.com

Keywords: ASICs, ASIC design, EDA, EDA tools, electronic design automation, power analysis, power optimization, Apache Design Solutions, EE Times EDA Designline
602/38338 4/11/2012 515 58


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