Publication: EE Times Embedded Contributor: Mentor Graphics Corp.
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April 17, 2012 -- The importance of power management and optimization in today's embedded designs has been steadily growing as an increasing number of battery-powered devices continue to perform more complex tasks. The unrelenting demand for connectivity and new features presents a growing challenge to designers. Yet, very often power optimizations are left to the very end of the project cycle, almost as an afterthought. When setting out to design a power-optimized embedded device, it is important to consider power management from the very inception of the project.
This article discusses design considerations that should be made when beginning a new embedded design. The considerations include choosing the hardware with appropriate capabilities, defining hardware-design constraints to allow software to manage power, making the right choice of an operating system and drivers, defining appropriate power-usage profiles, choosing measurable power goals, and providing these goals to the software development team to track throughout the development process.
By Adam Kaiser. (Kaiser is a Nucleus RTOS architect for the Mentor Embedded team at Mentor Graphics Corp.)
This brief introduction has been excerpted from the original copyrighted article.
View the entire article on the EE Times Embedded website.
Read more about Mentor Graphics Corp. on SOCcentral.com |
| | Keywords: ASICs, ASIC design, embedded system design, embedded systems, EDA, EDA tools, electronic design automation, software development tools, power analysis, power optimization, low power design, low-power design, real-time operating systems, RTOS, EE Times Embedded, Mentor Graphics
| | 602/38343 4/17/2012 606 67 | |
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