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 Category: Magazine & Journal Articles Online: Article Archive 2012: Tuesday, May 21, 2013
Reducing Energy Cost of Intra-Chip Communications  
Publication: EE Times Smart Enery DesignLine
Contributor: CEA-Leti
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May 15, 2012 -- With the advent of new highly computing-intensive mobile applications (high-throughput and software-defined radio, high-resolution video streaming, 3D image processing, augmented reality, etc.), current system-on-chips (SOCs) are quickly moving towards many-cores for increasing parallelism. As a result, the number and distance of communications between these cores are growing exponentially. This point is explaining the relative importance of communications which can account for up to 30% of overall energy consumption in the highest performing many-core architectures.

 

By Fabien Clermidy, Ivan Miro-Panades, Yvain Thonnart and Pascal Vivet. (The authors are with CEA-Leti.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Smart Enery DesignLine website.

Read more about
CEA-Leti
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Keywords: computer system design, general-purpose computers, special-purpose computers, embedded system design, embedded systems, chip-to-chip communications, chip-to-chip interconnect, CEA-Leti, EE Times Smart Enery DesignLine
602/38551 5/15/2012 323 44


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