May 14, 2012 -- V Semiconductor, Inc. (V Semi) has announced the availability of its Digital PLL IP cores in several new technology nodes and foundries. The foundries include TSMC, UMC and the Common Platform Alliance. The IP cores have been silicon-proven and successfully characterized. Full characterization reports are now available.
The IP macro offers industry-leading power and area specifications. The modular footprint requires no off-chip components, while a highly accurate fractional synthesizer eliminates any integer reference clock requirements.
The design utilizes a proprietary digitized architecture which achieves best-in-class jitter characteristics and exceptional programmability. The PLL contains numerous programmable features, including Spread Spectrum Generation (SSC), adjustable phase control, and configurable power-savings modes.
The digital design minimizes process and temperature variation effects and scales seamlessly to other foundry technologies and nodes.
The IP core is available for licensing under V Semi's simple business model. All IPs come equipped with configuration software and 24-hour support.