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Arteris Unveils FlexLLI MIPI Alliance Low-Latency Interface (MIPI LLI) IP to Reduce Mobile Phone Cost  
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February 29, 2012 -- Arteris SA has announced availability of its FlexLLI digital controller IP that implements the MIPI Alliance Low-Latency Interface (LLI) 1.0 inter-chip communication specification. This chip-to-chip interface IP is silicon-proven, having been implemented in the industry's first system-on-chips (SOCs) that have LLI, including the OMAP5430 from Texas Instruments, Inc.

Arteris FlexLLI offers a point-to-point interconnect between two chips, such as a mobile phone application processor and modem baseband processor. Using this high-bandwidth, low-latency interconnect enables the modem baseband processor to access the application processor's dedicated DRAM memory for modem operation, thus eliminating a separate, dedicated modem baseband DRAM chip. Industry estimates translate this savings to an approximate $1 to $2 reduction in the total bill-of-materials cost for a smartphone. PCB board space and thickness is also saved, giving mobile device manufacturers a win-win solution to create smaller and thinner devices.

This configurable IP connects easily with SOC interconnects using AMBA AXI, OCP and proprietary protocols, as well as Arteris FlexNoC network-on-chip interconnect IP. FlexLLI also interfaces with commercial MIPI M-PHY IP, such as the Synopsys M-PHY, as well as internally developed M-PHYs. Arteris FlexLLI is the first LLI digital controller IP to be implemented by semiconductor vendors in SOCs.

"TI developed the OMAP platform as a discrete architecture to create design flexibility through the attachment of companion chips including modems, bridges and more which require a low-latency interface between the OMAP processor and the companion chip," said Remi El-Ouazzane, Vice President and General Manager, OMAP platform business unit at TI. "TI invented the C2C interface, the first low-latency interface introduced in the market, and cooperated with Arteris on the next-generation chip-to-chip interface, which was brought to the MIPI Alliance and evolved into the LLI interface"

For those desiring a complete LLI digital controller and M-PHY solution, Arteris and Synopsys also announced a joint solution consisting of Arteris' FlexLLI MIPI LLI digital controller IP and Synopsys' DesignWare MIPI M-PHY(SM) IP.

Availability

Arteris FlexLLI MIPI LLI IP is available today.

Go to the Arteris SA website to find additional information.

E-mail Arteris SA for more information.

Read more about
Arteris SA
on SOCcentral.com


Keywords: ASICs, ASIC design, interface IP, intellectual property, cores, network-on-chip, NoC, on-chip interconnect, Mobile Industry Processor Interface, MIPI, Arteris
601/37964 2/29/2012 553 73


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