SOCcentral: ClariPhy Licenses Tensilica's Xtensa Dataplane Processor (DPU) for Optical Networking Mixed-Signal, Signal Processing (MXSP) SOCs (Tensilica, Inc. 37971)

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Wednesday, May 22, 2013

ClariPhy Licenses Tensilica's Xtensa Dataplane Processor (DPU) for Optical Networking Mixed-Signal, Signal Processing (MXSP) SOCs

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March 1, 2012 -- Tensilica, Inc. today announced that ClariPhy Communications, Inc., a developer of ultra-high-speed mixed-signal, digital signal processing (MXSP) system-on-chip (SOC) solutions for coherent optical networks, has licensed Tensilica's Xtensa dataplane processor unit (DPU) for a deeply embedded control application.

"We benchmarked other CPU and controller cores and selected Tensilica's Xtensa DPU because it offered us a unique combination of a robust standard architecture with a rich third-party ecosystem, plus the ability to configure and extend the core to meet our exact applications need," stated Reza Norouzian, Vice President of Sales and Business Development at ClariPhy. "With Tensilica, we are able to leverage the reuse advantages while still reaping the benefits of differentiation arising from customization of the core."

Go to the Tensilica, Inc. website to find additional information.

E-mail Tensilica, Inc. for more information.

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Tensilica, Inc.
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ClariPhy Communications, Inc.
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Keywords: ASICs, ASIC design, DSP, digital signal processing, digital signal processors, IP, intellectual property, cores, Xtensa dataplane processors, DPUs, Tesilica, ClariPhy Communications,

601/37971 3/2/2012 488 68

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