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Cadence Introduces the Tempus Timing Sign-off Solution  

May 20, 2013 -- In a move to ease and speed the development of complex ICs, Cadence Design Systems, Inc. today introduced the Tempus Timing Sign-off Solution, a new static timing-analysis and -closure tool designed to enable system-on-chip ... read more

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Aldec Launches Spec-TRACER Requirements Lifecycle Management for Safety-critical FPGA and ASIC Designs  

May 20, 2013 -- Aldec, Inc., a pioneer in mixed-language simulation and advanced design tools for FPGA and ASIC devices, today announced the launch of Spec-TRACER™, a new requirements lifecycle management solution for use in safety-critica ... read more

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BittWare Joins Altera Preferred Board Partner Program for OpenCL  

May 20, 2013 -- BittWare, Inc., a maker of Altera-based FPGA COTS boards, has joined the Altera Corp. Preferred Board Partner Program for OpenCL. BittWare's S5-PCIe-HQ (S5PH-Q) PCIe COTS board is optimized for the most current Altera devic ... read more

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Mentor and Tezzaron Optimize Calibre 3DStack for 2.5/3D-ICs  

May 20, 2013 -- Mentor Graphics Corp. and Tezzaron Semiconductor Corp. today announced they are collaborating to integrate the Mentor Calibre 3DStack product into Tezzaron's 3D-IC offerings. The new integration will focus ... read more

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Fourth Multicore Challenge Now Open for Registration  

May 20, 2013 -- Taking place in Bristol UK on June 12, this year the conference, sponsored by Test and Verification Solutions, Ltd. (TVS), will focus on heterogeneous systems with three main themes of heterogeneous architectures, low power ... read more

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QuickLogic Parallel Camera Interface for TI Sitara AM335x ARM Cortex-A8 Processors Supports Android Jelly Bean 4.1.2 OS  

May 20, 2013 -- QuickLogic Corp. today announced that its Parallel Camera Interface (CAM I/F) for Sitara AM335x ARM Cortex-A8 processors from Texas Instruments, Inc. (TI) now supports the Android Jelly Bean 4.1.2 Operating System (O ... read more

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Synopsys DesignWare IP for PCI Express 3.0 Passes First PCI-SIG PCIe 3.0 Compliance Workshop  

May 20, 2013 -- Synopsys, Inc. has announced that its DesignWare PHY and digital controller IP for the PCI-SIG PCI Express 3.0 is the first complete solution from a single vendor to pass compliance testing at the first PCI-SIG compliance w ... read more

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Xilinx Achieves PCI Express Compliance Across Its All Programmable 28-nm Devices  

May 20, 2013 -- Xilinx, Inc. today announced that its All Programmable 7 series FPGAs and Zynq-7000 All Programmable SoCs have achieved full PCI Express compliance and are now listed on the PCI-SIG integrator's list. All of Xilinx's 28-nm ... read more

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Test and Verification Solutions Expands Library of Verification IP  

May 20, 2013 -- Test and Verification Solutions, Ltd. (TVS) has announced that it has expanded its asureVIP library of verification IP to cover protocols in MIPI, memories, Universal Serial IO and communication as well as a VIP-development ... read more

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sureCore Receives SMART Award to Prototype Its Low-Power SRAM Technology  

May 20, 2013 -- sureCore, Ltd. has secured a Technology Strategy Board SMART award of £250,000 to help realize the company's low-power SRAM technology in a leading-edge next-generation silicon process node. Working with the major foundries ... read more

Category: News: News Archive 2013:



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