SOCcentral: Esterel Technologies, Inc. (14686)

You are at: The item(s) you requested.

Friday, May 24, 2013

Esterel Technologies, Inc.

Address: Parc Euclide, 8 rue Blaise Pascal
Elancourt 78996 FRANCE
Phone: 33 1 30 68 61 60
Email: info@esterel-technologies.com
Website: www.esterel-technologies.com

Esterel Technologies’ solutions for critical embedded application software development enable our customers to automate a seamless design process ranging from specifications capture to certified code generation and target integration. All Esterel products accelerate design/implementation, reduce testing demands, increase product quality, and preserve/control our customers’ intellectual property (IP).

News
Esterel Introduces SCADE LifeCycle Qualified Test Environment and Interface with the LDRA Tool Suite	7/24/2012
ANSYS to Acquire Esterel Technologies	5/29/2012
Mistral and Esterel Technologies Announce Partnership to Expand SCADE Deployment in India	4/6/2010
Esterel Technologies and Quantum3D Form Strategic Alliance to Offer One-Stop Solution for Embedded Graphics Display Development	12/2/2009
Esterel Technologies Joins Wind River Partner Validation Program	10/7/2009
Synfora Acquires Esterel Studio, Adds Control-Intensive IP Development Capabilities to Product Portfolio	8/27/2009
Esterel Technologies and LynuxWorks Partner to Offer Critical Embedded Software Development Workflow for DO-178B Applications	3/4/2009
Esterel Studio 6.1 Brings Verification Methodology Handbook to ESL Synthesis	12/18/2008
Esterel Studio Adopted at STMicroelectronics for Design of STBus- and STNoC-Based Control-Intensive IP	1/18/2008
ARM and Esterel to Deliver Software Development Tools for Safety-Critical Systems	12/4/2007
Synfora and Esterel EDA Technologies Simplify Integration of Application Engines into SoCs	11/5/2007

Go directly to Esterel Technologies, Inc. for more company and product information.

Keywords: Esterel Technologies, embedded, Synthesis (ESL),

206/14686 7/19/2005 9940 458

Rate this vendor's website (anonymous postings will be deleted)

Designer's Mall

0.515625

Search site for:
Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification

Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP

Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!

Mike Donlin
The Write Solution
Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL

Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search
SOC Design ASIC Design ASIC Verification FPGA Design CPLD Design PCB Design DSP Design RTOS Development Digital Design	Analog Design Mixed-Signal Design DFT DFM IC Packaging VHDL Verilog SystemC SystemVerilog