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Analog Circuits Need More Than Just DFT Methods  
Publication: Electronic Engineering Times (EE Times)
Contributor: PolarFab, Inc.
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March 3, 2003 -- "Digital design is, of necessity, performed at a very high level of abstraction. When dealing with millions to hundreds of millions of transistors, working at the transistor level is completely impractical. Designers of digital chips focus on things such as design-for-test (DFT), logic verification and synthesis quality. They are concerned with area, power and timing constraints of the design, obtaining timing closure of the physical design, the quality of the intellectual-property blocks they are using and many other high-level issues. In most cases, a digital designer is unconcerned with transistor- or even circuit-level issues.

"By contrast, analog design is performed at a very low level of abstraction, traditionally the transistor level. In addition to often handling unusual voltages and currents that require special consideration, analog designs are driven from schematics rather than high-level code, and highly dependent on the quality of the simulation models."

By Steve Kosier. (Kosier is Vice President, Engineering, PolarFab, Inc.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the Electronic Engineering Times (EE Times) website.

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Keywords: Electronic Engineering Times, PolarFab, DFT
568/1499 3/3/2003 10364 1004


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