Page loading . . .

  
 You are at: The item(s) you requested.Saturday, May 25, 2013
Learn To Manage All Kinds of Complexity with SystemC  
Publication: Electronic Design Magazine
 Printer friendly
 E-Mail Item URL

September 29, 2005 -- SystemC came about because of the need to model systems-on-a-chip (SoCs). SoCs require concurrent modeling of hardware and software, increasing complexity to a level that could not be managed any other way. Today’s use of SystemC ranges from SoC design to FPGA design to test and verification of chips.

However, if we look a little deeper, it becomes clear that SystemC has much more to offer in a variety of different technology domains and applications. The platform is actually well-suited to model almost any real-life system or organism. It offers an extensible framework, an integral concept of time at multiple scales, the ability to encapsulate algorithms and behavior in modules with well-defined interfaces, the ability to model concurrent behavior, hardware agnosticism, and the ability to provide a variety of visualization mechanisms.

By Imran H. Khan. (Kahn is founder and president of SoftServ International.)


This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the Electronic Design Magazine website.

Keywords: Electronic Design Magazine, SoftServ International, SystemC
563/16297 9/29/2005 9044 936


Designer's Mall
0.1523438



Copyright 2002 - 2004 Tech Pro Communications, P.O. Box 1801, Merrimack, NH 03054
 Search site for:
    Search Options

Subscribe to SOCcentral's
SOC Explorer
Newsletter
and receive news, article, whitepaper, and product updates bi-weekly.

Exec Viewpoint

The Many Faces
of Low-Power Verification


Ghislain Kaiser
CEO, Docea Power

Exec Viewpoint

Maximizing the Value of Your Internal IP


Warren Savage
CEO, IPextreme

Odd Parity

Lets' Go On
with the Show!


Mike Donlin
The Write Solution

Odd Parity Archive

Barbara's Bytes

So, Just What
Is ESL


Barbara Tuck
Senior Editor,
SOCcentral

SOCcentral Job Search

SOC Design
ASIC Design
ASIC Verification
FPGA Design
CPLD Design
PCB Design
DSP Design
RTOS Development
Digital Design

Analog Design
Mixed-Signal Design
DFT
DFM
IC Packaging
VHDL
Verilog
SystemC
SystemVerilog

Special Topics/Feature Articles
3D Integrated Circuits
Analog & Mixed-Signal Design
Design for Manufacturing
Design for Test
DSP in ASICs & FPGAs
ESL Design
Floorplanning & Layout
Formal Verification/OVM/UVM/VMM
Logic & Physical Synthesis
Low-Power Design
MEMS
On-Chip Interconnect
Selecting & Integrating IP
Signal Integrity
SystemC
SystemVerilog
Timing Analysis & Closure
Transaction Level Modeling (TLM)
Verilog
VHDL
 
Design Center
Whitepapers & App Notes
Live and Archived Webcasts
Newsletters


About SOCcentral.com

Sponsorship/Advertising Information

The Home Port  EDA/EDA Tools  FPGAs/PLDs/CPLDs  Intellectual Property  Electronic System Level Design  Special Topics/Feature Articles  Vendor & Organization Directory
News  Major RSS Feeds  Articles Online  Tutorials, White Papers, etc.  Webcasts  Online Resources  Software   Tech Books   Conferences & Seminars  About SOCcentral.com
Copyright 2003-2013  Tech Pro Communications   1209 Colts Circle    Lawrenceville, NJ 08648    Phone: 609-477-6308
1  0.265625