After many false starts, the infrastructure and standards for electronic system level (ESL) design are starting to make a difference to the system on chip designer. While design-chain support for ESL techniques is maturing, organizations across the semiconductor industry are still making a lot of noise and generating hype around ESL and their related offerings. What are they really doing to bring the practical benefits of ESL design to the market?

The cold hard truth is that there are very few organizations out there that can rightfully claim that they are successfully bridging the divide between software and hardware design. It is only with a solution to this concurrent and dependent development process that ESL design can truly benefit the System-on-chip (SoC) designer.

ESL: Why bother?

Like the technical field itself, there is a hardware and software view to the value of ESL design. For the hardware designer, the challenge of pushing clock speeds and processor architectures to achieve competitive system performance is greater than ever. And so are the physical complexities associated with fabricating silicon at 65nm process points and beyond. This all means that designers need other ways to squeeze performance out of existing technologies to handle the large number of interconnected functional blocks, and to validate full system behaviors early in the design process. System architects are making decisions later in the design schedule in looking to optimize functionality by moving software functions into accelerators, and shaping the on-chip communication networks and memories to support key features of the software architectures.

For the software designer, the issue of architectural management has become even more pronounced. While on-chip transistor count has increased 50 fold in the past ten years, software complexity has increased almost 1000 fold in the same time period. The sheer volume of applications and functionality already moved into the software domain demands much earlier starts to the software development process. With system architecture hardware optimizations being left to later, and software development starting earlier, the industry is demanding new platforms for software development and design exploration. The age of the concurrent hardware / software development process has truly arrived.

The time-to-market and system complexity pressures are also driving the design outsourcing market. System companies have to rely more on intellectual property (IP) from third parties, focusing their product differentiation on engineering system architectures and specific integrated custom-blocks. The reality of designing in several hundred hardware and software IP blocks from a variety of sources also means that the system designers need more than the back of an envelope and an excel spreadsheet. This IP doesn’t come with ‘in-house’ knowledge: the behavior and validation has to be expressed through functional models.

But, severe as this problem is, who out there in the industry is actually doing anything to address the “why bother” question? Is any one company creating a complete solution to the problem?

Is ESL the one solution to the problem?

ESL design describes a SoC design in an abstract enough and fast enough way to explore the design space and provide virtual prototypes for hardware and software implementation. Beside the speed, these executable models are available early: for example, you don’t need a full hardware pipeline for an instruction-accurate model of a CPU. Flexible, early system modelling is becoming a fundamental part of the design flow because we can now use it throughout the iterative design process rather than just in the early system architecting phase.

The ESL design process allows the design of hardware and software concurrently. A solid virtual prototype model provides designers working at the electronic system level with a platform on which real embedded software can be executed and at the same time accurately predict the software’s behavior. The time consuming task of code generation can then be kicked off and tweaks can be made where necessary to minimize design errors, without holding up the entire design project. In parallel the hardware designers can get to work on the register transfer level (RTL) code with greater certainty that major changes will not be demanded by the product manager late in the process.

ESL on the move: An evolution taking place right now

Although the idea of being able to describe a system at an abstract level has been around for a decade, only now are various parts of the design tool flow becoming available to make it practical. And only now is the design chain that supports critical design outsourcing being moved above the RT level.

Gartner Dataquest predicts that ESL is the next big wave of change to hit the design-flow automation market. ESL deals with both hardware, IP and software - therefore the emerging design methods and tools will affect developers in both domains in earlier stages of the design process. They see that ESL as an entirely different market to existing design support. It is neither EDA nor embedded software. Gartner predict the ESL market will easily be the fastest growing area of the design automation. The market is expected to be worth 163.3 million dollars this year, rapidly rising to 639.7 million dollars by 2008.

The growth of the ESL is based on emerging standards for passing data and design constructs through the development process between different design tools. Therefore ESL can only take off when design-IP is expressed and supported by the IP companies that provide the designs. Early tools that tried to tackle ESL design imposed new, and often proprietary, design flows, languages and coding styles on the designer and that was the major reason these tools failed to take hold in the late 1990s. Another reason was that the design world lacked the libraries of blocks of IP and the models of functions that could be used to construct these systems. However, more fundamentally, the failure of ESL in the 1990s was due to a conventional model of EDA being applied to the ESL market. ESL is a design tool, it is an expression of IP to the customer, and it is a prototyping solution to the software developer. These aspects are inseparable.

Today, ESL has technically evolved into several categories that work to aid different levels of design. These include: platform-based design, transaction-level modelling, C-based simulation, hardware/software co-verification, and performance optimization. Designers can pick and mix to create the ESL environment that best suits their needs. Beyond this, the flows to implementation are finally emerging both through C-based synthesis, as well as configuration-based IP generation. IP companies are today starting to take the bold step of expressing their highly configurable IP not as scripted Verilog files, but as environments with direct user engagement models. Indeed, it is the fusion of IP and a design tool that is the future of IP delivery.

Why choose ESL?

Why ESL? The better question is “why not?” From our experience with customers, the primary reason to use ESL tools is the definitive time-to-market advantage that it gives companies. Quoted time-to-market improvements of up to forty percent have been seen by some customers using ESL tools as part of their design methodology. The task of integrating upwards of 200 IP blocks and several Megabytes of software is set to get greater as process geometries decrease. Designers are able to prototype their ideas more quickly and get to the best solution before committing to the expensive process of writing the final software or designing the silicon.

As a front end to the design flow and a common environment for hardware and software engineers to communicate, the system design generated by ESL tools can be trialed and evaluated. It ties back to and old industry joke:

Question: “What do the hardware and software engineers from the same company do when they meet?”
Answer: “Exchange business cards.”

Sadly this is still true in many companies, where the two disciplines are treated separately.

Using an ESL methodology gives the system designer a way of visualizing the design in an environment that both hardware and software designers can use. It enables that vital exchange of architectural design constraints between the hardware and software development teams. Beyond support for concurrent development within a company, the early models generated from the ESL tools can be used as an executable specification. These can serve as the basis for engagement between a systems-solution provider, or an IP provider, and its customers. The models provide a quantitative rather than qualitative way to evaluate proposed design and make recommendations for changes. It is the ideal vehicle for expressing design intent. This leads to faster time-to-market and less misunderstandings due to the improved communication that ESL methodology enables.

Standards such as SPIRIT also allow improved communication between stages of the design process, or between design provider and their customer. This language generic way to express design configuration and integration requirement ensures that any changes that occur late in the design process are reflected through to the various views of a design, down to the implementation phase or back up into the system design phase. This methodology of data exchange ensures that the engineering teams are not relying on the interpretation of a written specification.

ESL tools can be used along with models of the IP produced by IP vendors to evaluate new IP early in the selection process and have a way of actually exercising the IP in a customer environment. ESL tools also help to address a major concern of IP adopters – the cost of IP integration. They want to know if the design will do what is expected, and that they can ensure it physically connects into the system easily. With models and rigorous flow to implementation, these risks are minimized. Integration of legacy IP is an important requirement and should be made possible through partner relationships provided by your ESL solutions supplier.

Lastly, when making ESL a part of the design flow, it is important to point out that ESL solutions provide information on the system design to allow designers to make best first-time utilization of their product. Think of this as maximizing the feature capacity of your design, both from the perspective of supportable software and integration of differentiating hardware IP. ESL lets you design safely, closer to the margins whereas, for example, spreadsheet analysis is coarse and is by nature highly conservative. What is it worth to your system design company to be able to safely reduce performance design margins by 50 percent? A lot in terms of first-to-market features, and that is what market capture is all about.

Only ESL can handle today’s complex design trade-off issues

Today it's not enough to design the hardware and the software separately. The “above RTL” design flow needs to be defined to get the best methodology for architecting a system. Remember, it is now the system architecture that is becoming the primary product differentiator, not one wonderful piece of hardware or software functional design.

Consider that software generates the bus traffic that the hardware must process and move around the system. Designing the fabric and understanding what will be demanded of the bus fabric, is a critical part of the overall system design and the needs of the software must be well understood and modeled to get the optimal on-chip communications design.

Consider also that careful design of the software can also go a long way to reducing the power consumption of the final device. Location of critical routines in the system memory drives overall system power consumption. Tools are now available that can analyze software code and make recommendations on how to restructure it for more optimal power consumption.

Multiple processor designs are now a reality and are often coupled with power saving strategies that dynamically change the resources available to run the system. ESL tools are absolutely vital to analyze these systems in conjunction with the software to optimize software partitioning and threading, and to ensure that stated power savings can be achieved.

ESL also provides a common debug front end for the software developer and systems validation engineers. This allows software and hardware engineers to exchange executable information about problematic system traces. System models can monitor and trace more information than the final hardware making it easier and faster to track down problems.

At its most basic level an ESL design methodology is the only way in today’s designs to make an informed trade-off of how the product can be differentiated in hardware, software or both. This is accomplished by early design models that can help identify unused (and extremely valuable) real estate on the chip, explore complex scheduling paradigms, and maximize product features through more reliable performance estimates of the hardware.

And now it’s time to take the product into consideration

A critical success factor in system level design is the simple fact that ESL solutions need to be considered as a part of an overall design flow - the ability of the tools to import and export design configuration and run-time data from and to other design environments is very important for integrated design flows. Of equal importance and one of ESL’s major benefits is that it automatically maintains structural and functional consistency when moving between front-end stages of the design process.

ESL is a very complex area touching on at least five different disciplines: Algorithm Design, SW design, Verification / Validation, Architectural Modeling, and Hardware Implementation. Any supplier not enabling all of these areas to be addressed through their own solutions or close partnerships fails to offer a true ESL solution. It is imperative that ESL tools work with other design environments. For example, co-simulating with EDA simulators is an excellent example of how the tools need to work together to achieve the best results. However, that is only the beginning. As the fusion of tools and IP at the ESL level continues, interoperability has to cover structural design exchange, expression of design constraint, behavior to implementation mapping, and a comprehensive hardware and software debugging environment that covers all design views.

Many of the new generation of ESL tools from companies such as ARM, Beach Solutions, CoWare, Cadence Design Systems, Mentor Graphics, Prosilog, Synopsys, and Verisity (now being acquired by Cadence), are able to claim that design and verification tasks that traditionally took weeks or months can now be done in minutes. Over the coming year, customer results will further boost confidence that ESL design-flows and the tools and models that support it, are resolving the implementation design gap. ESL methodologies will provide a reliable way to get tens of millions of gates and hundreds of thousands of lines of embedded code written and validated quickly to meet the ever increasing customer demand. ESL will become the new design-entry point for hardware and software development.

By Bryn Parry, General Manager, Development Systems, ARM