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OneSpin Solutions GmbH  
Address: Theresienhoehe 12
              Munich 80339 GERMANY
Phone: 49 89 99013 0
Email: info@onespin-solutions.com
Website: www.onespin-solutions.com/


OneSpin Solutions provides electronic design automation methodologies, tools and services for fundamental verification tasks at transaction, register transfer and gate levels. OneSpin's patented technology not only significantly increases the quality of designs, but also reduces verification efforts and costs. The company currently offers two verification solutions, which share a common technology foundation, and which have been field proven on hundreds of designs.

The OneSpin 360 Module Verifier systematically and efficiently detects all functional errors in complex digital modules and intellectual property (IP), such as peripherals, processors, and processor-based subsystems of up to a few hundred thousand lines of code, enabling True Functional Sign-off. The OneSpin 360 Equivalence Checker is a highly automated, high precision verification solution to ensure correctness of synthesis and implementation steps. It can be used either in conjunction with 360 MV to preserve the module's quality level through subsequent implementation design phases, or stand-alone to assure full-chip implementation design equivalence.

SOCcentral Feature Articles

Verified Beyond Doubt

3/14/2013

Articles Online

How Formal MDV Can Eliminate IP Integration Uncertainty

1/9/2012

Achieving Certified IP Quality Efficiently

5/29/2007

Achieving Completeness in IP Functional Verification

2/12/2007

News

OneSpin Solutions Tools to Be Available in the Cloud

5/15/2013

OneSpin Solutions Unveils Spinnaker Certified Service Partners Program with Five Inaugural Members

4/29/2013

OneSpin Solutions and Oasys Design Systems Sign OEM Agreement

2/26/2013

OneSpin Solutions Adds RTL-to-RTL Equivalence Checking to Product Family

2/11/2013

OneSpin Solutions Unveils OneSpin 360 DV Product Family

2/11/2013

OneSpin Solutions' Formal Verification Software Enables Maxim to Identify SOC Design Issues Early in the Project Cycle

12/17/2012

Azini Capital Funds OneSpin Solutions to Accelerate Growth

5/31/2012

OneSpin Launches Comprehensive Solution for Automatic Metric-Driven Formal Assertion-Based Verification Coverage Analysis and Measurement

5/23/2011

OneSpin Solutions Announces 360MV-Based Formal Verification Environment Adopted by Renesas Electronics for Its MCU Platforms

5/16/2011

Azini Capital Acquires OneSpin Solutions

1/25/2011

OneSpin Solutions Enhances 360 MV for Safe, Exhaustive 4-State Formal Analysis and Verification

6/7/2010

OneSpin Announces Customizable Integration Between 360 MV Verification Solution and Platform LSF Infrastructure

2/22/2010

OneSpin's New Debug Automation Technology Boosts Formal Assertion-Based Verification Productivity

7/15/2009

Tieto Signs Long-Term Agreement to Deploy OneSpin Solutions' Formal Assertion-Based Verification Solution

7/6/2009

OneSpin's Formal Assertion-Based Verification Approach Enables Step-by-Step Adoption and Use

1/19/2009

OneSpin Announces First SVA Solution for Gap-free Verification

6/4/2008

OneSpin Solutions Boosts Formal Verification Productivity with New GapFreeVerification Process

2/18/2008

OneSpin Solutions Complements 360 Module Verifier with Standard Assertion Language Support

1/22/2008

OneSpin Solutions Delivers First Equivalence Checker Dedicated to FPGA Synthesis Verification

12/10/2007

OneSpin Solutions Expands Business Operation in Japan

11/15/2007

OneSpin Solutions Joins Accellera

5/30/2007

OneSpin Solutions Establishes Operations in Japan

5/21/2007

OneSpin Enhanced 360 Module Verifier Delivers Complete Multi-Configuration IP Verification Solution

5/14/2007

OneSpin Solutions Delivers Next-Generation Equivalence Checker for Advanced FPGA Design Verification

2/12/2007

OneSpin Solutions Enters EDA Market with Formal Verification Solution

5/8/2006


Go directly to OneSpin Solutions GmbH for more company and product information.

Keywords: OneSpin Solutions, EDA, Formal Analysis (RTL), Formal Verification (RTL),
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