There is currently a tremendous amount of interest in the topics of design for manufacturability (DFM) and design for yield (DFY). One issue is that, as for many things in the electronics and electronics design automation (EDA) industries, the terms DFM and DFY are not well-defined. Actually, some may say that these terms are over-defined, because different companies define them in different ways depending on their point of view.
In reality, both of these concepts resolve to overcome the same problem: designing chips that can be physically manufactured and work as planned. The purpose of this white paper is to explain why there are DFM/DFY problems with the current 90-nm and 65-nm technology nodes, why these problems will become even more significant with future nodes, and why legacy design tools and flows are simply not equipped to address these issues. Also discussed are the core requirements for a true DFM/DFY flow that can satisfy the requirements of today’s ultra-deep submicron technologies.
