In the context of digital IC designs, the term DFM (design for manufacturability) has – until recently – referred to postprocessing the GDSII file with a variety of resolution enhancement techniques (RET), such as optical proximity correction (OPC) and phase-shift mask (PSM). This is no longer viable in chips created at the 65-nm technology node and below. To achieve acceptable performance and yield goals, the entire design flow has to become DFM-aware. This includes DFM-aware characterization; DFM-aware implementation, analysis and optimization; and, ultimately, DFM-aware sign-off verification.
This paper first explains the problems associated with ultra deep-submicron technologies, including process variability, lithographic, manufacturing and yield issues. Next, the paper describes the requirements for a true DFM-aware design environment. Finally, the paper introduces the Magma DFM-aware solutions.
