January 15, 2007 -- As system-on-ship (SOC) designs grow ever larger, design and verification flows are changing. A rich mix of features, increased software content, high intellectual property (IP) use and submicron implementation technology have semiconductor and system companies searching for new electronic system level (ESL)-based design flows. An emerging trend is a transaction level modeling (TLM)-to-register transfer level (RTL) design flow, though a set of requirements needs to be addressed to ensure a successful transition to this new flow.
This article uses the generic term TLM to refer to a higher abstraction level model. Where necessary, it will be prefixed with cycle-accurate, cycle-approximate or functionally accurate to denote the accuracy level.
By Lauro Rizzatti and Rindert Schutten. (Rizzati is General Manager of EVE USA and Schutten is a Consultant with ESLcentric.)
This brief introduction has been excerpted from the original copyrighted article.