The rapidly evolving semiconductor industry has always relied on innovation to sustain advancement. From the creative forces behind the myriad of consumer electronic products to the technology improvement behind sub-micron silicon running at gigahertz speed, innovation makes electronic systems possible.

Gartner Dataquest (2004) states that more than half of IC designs are System-on-Chip (SOCs) meaning they contain some type of processor and memory subsystem. With the adoption of IP, from internal or external sources, additional importance is placed on system-level design and integration. Designers are being pushed to work at higher levels of abstraction while at the same time meet strict power and performance requirements. In addition to these pressures, design teams are faced with the familiar challenge of getting their SOC working within a tight project schedule.

It is clear that the semiconductor industry must adopt system-level design and verification methodologies. However, before design teams can move forward there is a prerequisite on tools and technologies that support a RTL to system level transition.