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The Embedded Plan for JTAG Boundary Scan  
Publication: Electronic Design Magazine
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September 11, 2008 -- In 1990, the IEEE ratified the 1149.1 standard known as boundary scan. Developed by the Joint Task Action Group (JTAG), it was created to help solve the overwhelming testing problems caused by ever-increasing larger-scale ICs and densely packed multilayer printed-circuit boards (PCBs).

The old "bed of nails" method of testing PCBs no longer worked as well, and the inaccessible circuits and even pins on ICs made testing difficult if not impossible. With boundary scan, IC and board manufacturers could provide fully automated testing.

The standard has been regularly updated over the years, and a whole infrastructure of hardware and software manufacturers has emerged to support testing efforts. Thanks to recent changes, the standard is part of embedded design platforms. Boundary scan now lies at the heart of a new test and measurement approach called embedded instrumentation.

By Louis E. Frenzel.

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the Electronic Design Magazine website.

Keywords: Electronic Design Magazine, boundary scan, JTAG, PCB design, EDA tools,
580/26839 9/11/2008 6308 260
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