January 13, 2009 -- Using an emulator for ASIC and system-on-chip, verification holds the promise of extremely high execution speed, enabling the validation of system-level scenarios that are unthinkable with simulation farms.
With MHz speeds, today's fast emulators can crunch enough cycles to run entire software application stacks on top of an SOC and truly perform hardware software co-verification. However, having a fast and accurate model of the ASIC solves only half of the problem. Without the corresponding system-level environment to drive the design, that potential is wasted.
By Lauro Rizzatti. (Rizzatti is General Manager of EVE-USA.)
This brief introduction has been excerpted from the original copyrighted article.
