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Securing SoC Platform Oriented Architectures with a Hardware Root of Trust  
Publication: EE Times Embedded
Contributor: Certicom Corp.
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July 6, 2009 -- An important trend that has been gaining traction over the past several years is the movement by chip architects toward Platform Oriented Architectures (POA). This is by no means an original concept since the microcontroller and its successors have been a very good examples of POA types of devices over the years.

Clearly, an embedded programmable controller, processor, or DSP can be modified via software to satisfy any number of functional requirements. As an extension of the embedded programmable processor (or controller), a Field Programmable Gate Array (FPGA) provides the ultimate POA conceptual device. One chip can support any number of hardware designs and may even be re-configured in-system.

Of course, due to the restrictions of cost for high volume applications and the unforgiving nature of silicon, hardware systems are typically optimized for the product applications they support. Thus, most product lines have traditionally required multiple chips within a chipset to address each market segment these chips serve. Why then is it important to now consider trends toward what the author has designated POA devices several decades after the invention of the FPGA?

Inevitably the answer to the above question is a matter of economics. A new and more flexible style of architecture is needed in the aftermath of the Structured ASIC (application-specific integrated circuit).

The failure of the Structured ASIC to find a home in between FPGA and ASIC technologies may arguably be the result of the time sensitivity chip designers have with regards to rapid increases in production volume.

In other words, the cost benefits of going with a Structured ASIC solution do not justify including a Structured ASIC step in the migration path from an FPGA in to an ASIC in order to reduce the unit cost as production volume warrants.

A contributing factor to the lack of popularity of the Structured ASIC is the fact that such a device cannot, by definition, serve broad application requirements and be adequately optimized to those same requirements at the same time.

In recognition of this, chip architects are now realizing the benefits of leveraging structured architectures for more narrowly defined application requirements. A multi-media player SoC is illustrated below as an example of a POA SoC device that takes this approach.

By Craig Rawlings. (Rawlings is the Senior Director of product management at Corp.)

This brief introduction has been excerpted from the original copyrighted article.


View the entire article on the EE Times Embedded website.

Read more about
Certicom Corp.
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Keywords: ASICs, ASIC design, FPGAs, field programmable gate arrays, FPGA design, system-on-chip, SoC, Certicom,
590/29345 7/6/2009 5422 241


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