October 11, 2009 -- With the rapid advance of process technology, the ability to squeeze more capability into a single system-on-chip (SOC) is forcing semiconductor developers to look at IP from outside sources. Most new design starts are targeting a 45-nm process, which means an embedded SOC can easily have 50 or even 100 cores. Clearly no one company, except for some of the very largest, can develop all the technology blocks needed in these complex devices. Because it’s clear most companies need to outsource non-critical IP blocks, a new set of tasks and questions are then required by the design teams. How reliable is the outsourced IP? Will it work easily with other parts of the system? Does it support standards? How easily can it be reused, and will it work in our tools flow? Sometimes the energy spent dealing with these questions can be as much work as developing the IP yourself (although the skill set will be different).

Ideally, when a product is outsourced, design managers don’t want to spend their resources developing bridges to interface to the IP or modify their tool flow to maintain all the features they have come to rely on. There are efforts from both IP and EDA companies to create more unified environments that allow the mixing and matching of tools and IP so that they work together seamlessly. These are necessary efforts and good progress is being made. For example, IP-XACT was developed as standard description for IP blocks and the Catalyst program from Synopsys is bringing tool and IP vendors together. But what is the next big outsourcing trend in SoC development? What is the technology piece that is becoming difficult and too costly to maintain internally?

The increasing number of heterogeneous SoC cores and increasing chip speed mean connecting these cores is no longer an easy task. What was once thought of as a simple bus now requires the sophistication to manage complex data flow through the system, the ability to connect many IP cores together from different sources with different protocols, and even the ability to communicate with the system software. Intelligent on-chip networks are becoming a standard way to deal with these issues. The term “network” is no longer an analogy. These are real networks that have to connect many blocks using multiple connection topologies to support the various types of data, including switches, routers, and serial and parallel connections. Developing these components is no longer the task of a single engineer on the design team, but instead requires a serious technology investment.

Frank Ferro. (Ferro is the Director of Business Development for Sonics Inc.)